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ASIC​/FPGA Verification Engineer IV

Job in Denver, Denver County, Colorado, 80285, USA
Listing for: Lockheed Martin
Full Time position
Listed on 2026-06-03
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 123500 - 217695 USD Yearly USD 123500.00 217695.00 YEAR
Job Description & How to Apply Below

Overview

ASIC/FPGA Verification Engineer – Join a leading team to develop sophisticated avionics products in an integrated product development environment.

Location & Schedule

Onsite full‑time at Lockheed Martin Space facilities. Locations:
Sunnyvale, CA;
Denver or Highlands Ranch, CO;
Cambridge, MA (Supplier site). Flexible 9x80 schedule with every other Friday off.

Key Activities
  • Work with low‑SWaP, radiation‑hardened, space‑rated devices.
  • Perform all aspects of ASIC and FPGA verification throughout the lifecycle, from requirements capture through architecture, design, analysis, simulation and testing in a Linux‑based high‑performance computing environment.
  • Devise and document a unique verification plan for each design.
  • Use System Verilog and Universal Verification Methodology (UVM) to verify designs.
  • Support technical reviews and present results to internal and external stakeholders.
  • Interface with independent verification teams working in parallel to resolve design bugs.
Qualifications
  • UVM expertise; mastery of System Verilog and VHDL.
  • Independent, well‑organized engineer comfortable in laboratory digital environments.
  • 5+ years of professional FPGA verification experience.
  • US citizenship and ability to obtain and maintain a DoD Secret clearance.
Basic Qualifications
  • Bachelor of Science or higher in Electrical Engineering or related discipline, or equivalent experience.
  • Experience in verification of FPGA and/or ASIC devices.
  • Experience with modern verification methodologies such as UVM, OVM or VMM.
  • HDL programming experience with VHDL, Verilog, and/or System Verilog.
Desired Skills
  • Knowledge of space‑grade/qualified FPGAs.
  • Experience or knowledge of MS Project and JIRA.
  • Knowledge of Python or other scripting languages.
  • Experience designing with AMD Versal, Microchip RTG4 FPGAs.
  • Lab testing experience.
Security Clearance

Requires a government security clearance; must be a US Citizen for consideration. Clearance level:
Secret.

EEO Statement

Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.

Compensation & Benefits

Annual base salary range: $123,500 - $217,695 (varies by state). The position is incentive plan eligible. Benefits include medical, dental, vision, life insurance, short‑term and long‑term disability, 401(k) match, flexible spending accounts, Employee Assistance Program, education assistance, parental leave, paid time off, and holidays.

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