Sr. Systems Performance Engineer

Who We Are:

Aurelius Systems is a VC backed defense tech startup building autonomous, edge deployed directed energy systems for counter-UAS. We build laser weapons to shoot down drones.

We're a small team of engineers, former US military operators, and subject matter experts scaling America's directed energy dominance. The first cost effective, reliable and robust laser weapon system.

Our namesake isn't an accident. Marcus Aurelius wrote about doing the work in front of you, every day, without excuses. Henry Ford didn't wait for permission to reinvent manufacturing.

That's how we operate — small team, unreasonable output, no hiding behind the unachievable.

In addition to our San Francisco lab, we've opened a Detroit manufacturing hub and we field test weekly on our own 400-acre private range.

The Role & Your Impact:

You'll own the architecture and performance of our full software stack as the Sr. Systems Performance Software Engineer.

Our system is a stack of complex subsystems working in concert: sensing, computer vision, ML inference, controls, fire control, C2, power, mechanical actuation. Every microsecond of latency is a drone that gets closer. Every inefficient kernel is a target that gets away. Your job is to make sure the whole stack, not any one piece, runs as fast and as deterministically as physics allows.

The critical gap we're hiring for is real-time systems performance architecture at the hardware boundary. You need to understand how software execution translates into physical system behavior; how latency accumulates across CPU, GPU, memory, and I/O; how bandwidth limits affect sensor pipelines; and how architectural decisions upstream constrain what's achievable downstream. We need an engineer who thinks in terms of microseconds, memory bandwidth, cache behavior, and determinism, and who can make architectural calls that the rest of the team builds against.

This is a senior IC role with subteam lead scope. You'll set direction on kernel-level optimization, driver work, and latency performance across fire control and C2. You won't own simulators or model orchestration. You will own whether the platform meets its latency budget.

What You’ll Own:

• Architecture, performance and latency budget of the full platform, from sensing through actuation

• Kernel-level and driver-level coding across the stack

• Profile and eliminate latency across CPU, GPU, memory, and I/O boundaries

• Develop and optimize CUDA kernels for high-throughput, low-latency execution

• Tune memory access patterns (global, shared, unified) for bandwidth efficiency

• Real-time architecture decisions across fire control and C2

• High-bandwidth sensor data ingestion and pipeline design

• Technical direction and mentorship for a subteam of engineers working in the optimization and realtime space

• Identify development priorities by directly analyzing technical and physical system limitations in the field

• Author architecture documentation and standards the rest of the engineering team builds against

What We’re Looking For:

• 4+ years in real-time systems or robotics software engineering with real hardware

• Expert-level modern C++ (C++17/20)

• Driver-level and kernel-level coding experience

• CUDA kernel optimization for throughput and latency

• Deep understanding of GPU memory models (global, shared, unified memory)

• Real-time pipeline architecture, not just real-time code

• ARM + Linux systems development (cross-compiling, profiling, kernel-level awareness)

• Performance optimization across CPU/GPU boundaries

• Shared memory and lock-free architecture design

• High-throughput peripheral data ingestion (USB, PCIe, Ethernet)

• Multithreaded systems and concurrency optimization

Not a fit if: Your experience is purely web/cloud software, ML research that never deployed to hardware, or you primarily work in managed languages. We need someone who’s fought real-time latency, sensor noise, and mechanical backlash at the kernel level.

Nice-to-Haves:

• Jetson platform experience

• DMA and zero-copy pipeline design

• Video pipeline experience (OpenCV, GStreamer, Vimba/Pylon)

• CoaXPress, USB3 Vision, or high-speed camera systems

• Linux kernel contributions or driver-level experience

• Prior experience leading a…