Distinguished Signal Integrity Engineer

Overview

Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications.

Join us at Ampere and work alongside a passionate and growing team.

Our Hardware Design Engineering organization is seeking a Distinguished Signal Integrity Engineer to be part of a team implementing high-performance solutions for high-bandwidth, connectivity-intensive multi-core processor products, requiring co-design of silicon, package, and PCB.

• Design, simulate, and validate high-performance interconnect solutions, collaborating with chip designers, package designers, and PCB designers (internal and external) to deliver end-to-end solutions with robust signal integrity performance.
• Develop layout guidelines for package and PCB, and SI/PI documentation for internal and external customers.
• Support product bring-up and customer engagements.
• Drive state-of-the-art signal integrity analysis methodologies.
• Influence Ampere’s technology roadmap by delivering technical leadership in next-generation interconnects, advanced packaging, and cross-functional system co-design.

• Experience in designing high-performance signal interconnect solutions.
• Experience with large body-size electronic packages and high-performance PCBs is preferred.
• Deep knowledge of transmission line and electromagnetic theory related to signal integrity and power integrity.
• Strong experience with parallel and serial interfaces, with emphasis on high-speed Ser Des (e.g., PCI-gen5/6/7 and/or USB/USB-C).
• Knowledge of simulation methodologies (time-domain and statistical) and ability to create and simulate 3D models in tools like HFSS, SIWAVE, and Power
  
  SI.
• Familiarity with link timing budgeting.
• Expert in end-to-end channel modeling (using HFSS/SIWAVE/Power
  
  SI) and link budget analysis with time-domain and statistical simulation.
• Understanding of behavioral IO models (IBIS, IBIS-AMI) and various equalization techniques (CTLE, DFE, TX equalization).
• In-depth understanding of Ser Des TX/RX equalization techniques and modeling in IBIS-AMI.
• Understanding of AC/DC power delivery, power integrity analysis, and simultaneous switching noise analysis for memory interfaces.
• Good understanding of power delivery impact on clocking and IO, and stack-up manufacturing process with design-for-manufacturability considerations.
• Strong communication, interpersonal, and collaboration skills.
• Electrical or Computer Engineering degree with 15 years of related experience; or Master’s degree with 12 years; or PhD with 8 years.

We provide a competitive total rewards package including base pay, cash long-term incentive, and comprehensive benefits. The full base pay range for this role is between $279,500 and $419,500, with an adjusted range in the San Francisco Bay Area between $293,000 and $440,000.

Our benefits include health, wellness, and financial programs that support employees through every stage of life.

• Premium medical, dental, and vision insurance, income protection, and a 401K retirement plan to support health and financial security.
• Unlimited flextime and 10+ paid holidays for work-life balance.
• A variety of healthy snacks, espresso, and beverages to keep you energized.

Ampere fosters an inclusive culture that empowers employees to do more and grow. We are excited to share career opportunities with you through the interview process.

EEO Statement:
Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran or military status, sex, sexual orientation, gender identity, gender expression, disability, or any other basis protected by law.