Senior FPGA Engineer

Description

Looking for an opportunity to make an impact?

At Leidos, we deliver innovative solutions through the efforts of our diverse and talented people who are dedicated to our customers’ success. We empower our teams, contribute to our communities, and operate sustainably. Everything we do is built on a commitment to do the right thing for our customers, our people, and our community. Our Mission, Vision, and Values guide the way we do business.

Your greatest work is ahead!

Leidos’
Defense Sector Space Business Area is seeking a Senior FPGA Engineer to join our team in San Diego, CA. This is an exciting opportunity to leverage your expertise in successfully deploying complex engineering projects, while contributing to our national defense mission.

We are looking for engineers who thrive in fast-paced environments and have a passion for developing and delivering high-tech solutions. Experience in space qualified designs for LEO, MEO, and GEO will be a plus and we value and welcome those with experience working for organizations like SDA, RCO, or DARPA. Emphasis is on complete life-cycle development of complex FPGAs starting with architecture, design, implementation, timing closure, and hardware testing.

If this sounds like the kind of environment where you can thrive, keep reading!

Leidos Defense Sector provides a diverse portfolio of systems, solutions, and services covering land, sea, air, space, and cyberspace for customers worldwide. Solutions for Defense include enterprise and mission IT, large-scale intelligence systems, command and control, geospatial and data analytics, cybersecurity, logistics, training, and intelligence analysis and operations support. Our team is solving the world’s toughest security challenges for customers with “can’t fail” missions.

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THE CHALLENGE (primary responsibilities)

• Complete ownership to architect the full high-density FPGA level design, develop/code/test the design, and finally integrate it on the hardware

• Mentor junior FPGA engineers as needed

• Perform data analysis, write technical reports, perform internal and customer design reviews, write and maintain interface design documents for complex FPGA design

• Develop and test FPGA designs for Chemical, Biological, Radiation, Nuclear, and Space sensor systems for federal government customers.

• Develop and execute FPGA test plans, determine root cause of test failures, and iterate with senior staff to determine design changes to improve FPGA performance.

• Collaborate with a multi-disciplined design team to design and integrate DSP applications for latest System on a Chip (SoC) implementations such as Xilinx Zynq Ultrascale+ and Xilinx Versal

• Understanding of image processing algorithms, basic knowledge of digital signal processing and tools to implement the DSP algorithms on the FPGA.

• Analyze, design, and implement HDL test benches in hardware description languages, HDL (VHDL, System Verilog), for code validation and validation against models.

• Ensure designs synthesize, place and route, meeting timing requirements from Virtex/Kintex7, Polar Fire and Versal FPGAs.

• Implement common signaling standards, typical IP hard macros such as SERDES, PLLS, etc. and/or protocols such PCIe Gen4, 40
  
  GBE Ethernet, DDR3/4, etc.

• Use judgment to perform technical troubleshooting and diagnosis of failed equipment and support root cause analysis.

• 0-10% travel to customer sites as required.

WHAT SETS YOU APART (basic qualifications)

• Proven ability to architect the entire FPGA level design, develop/code/test the design, and finally integrate it on the hardware is a must for this position.

• Bachelor's degree with 12 years relevant experience or M.S. degree in Electrical Engineering, Computer Engineering, or related field from an accredited college/university with 10+ years of relevant experience as an electrical engineer or computer engineer

• Must be able to obtain and maintain a Top Secret Security Clearance.

• Fluent in Vivado, Modelsim or Riviera. Fluent in test benches and self-checking verification methods. Must be able to synthesize, place and route,…