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Field-Programmable Gate Arrays Engineer

Job in El Segundo, Los Angeles County, California, 90245, USA
Listing for: Indotronix Avani Group
Full Time position
Listed on 2026-02-16
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 83 - 108 USD Hourly USD 83.00 108.00 HOUR
Job Description & How to Apply Below

Job Title:
Sr Electrical Engineer - FPGA & ASIC Design Solutions

Duration: 12 months

Rate: $83-$108/hr

Sr Electrical Engineer - FPGA & ASIC Design Solutions

Become part of the growing FPGA & ASIC Design Solutions team. As an engineer in this organization, you will be a member of an experienced, dynamic design group employing best practice design methodologies supporting our next generation of military GPS products.

Key Responsibilities will include:
  • Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing analysis and closure, verification, and system integration
  • RTL coding and simulation in VHDL or Verilog
  • Testbench development for the verification of RTL blocks using VHDL or System Verilog
This position requires these skills and abilities:
  • RTL coding and simulation in VHDL or Verilog OR Testbench development for the verification of RTL blocks using UVM and System Verilog
  • Digital circuit architecture, design, resource tradeoffs, timing analysis and timing closure
  • Proficiency using ASIC and/or FPGA simulation and synthesis tools (e.g. Modelsim, Synopsys, FPGA-specific tools)
  • Familiarity with revision control concepts and tools (e.g. Subversion)
  • Ability to work with minimal supervision, part of a team of engineers with a variety of skills and backgrounds
  • Strong oral and written communication skills and the ability to document and present one's work and status
  • Bachelor's Degree in applicable engineering field
Desired skills of a successful candidate:
  • Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, System Verilog)
  • ASIC / FPGA lab validation with advanced lab equipment
  • Design for Test (DFT) and manufacturability issues
  • Experience with Unix, scripting, C/C++, and/or Perl
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