FPGA Engineer, Leo Government
Listed on 2026-05-25
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Engineering
Systems Engineer, Software Engineer
Overview
Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low‑latency, high‑speed broadband connectivity to unserved and underserved communities around the world. Innovation is part of our DNA. We need people who want to join an ambitious program that continues to push the state of the art in distributed systems and hardware design.
About the TeamThe Leo Solutions Engineering team is a multi‑disciplinary technology team involved in developing and delivering targeted and scalable solutions for custom satellite and ground applications, including United States and allied government customers.
Key Responsibilities- Create and release FPGAs through the development phases of architecture, RTL design, physical implementation, timing closure, simulation validation, and lab‑based silicon validation.
- Collaborate with RF, optical communications and signal‑processing architects and design engineers to define, design, implement, and test modem and digital logic functions in FPGA technology.
- Write RTL code, develop test benches, perform simulation and timing closure, and debug in a laboratory environment.
- Apply proficiency in Verilog, System Verilog, or VHDL; experience with Xilinx Vivado or Microchip Libero; proficiency in Linux, scripting (Python/Perl), and interface protocols like PCIe or DDR.
- Collaborate with system architects and design engineers to implement digital logic functions in FPGA prototypes to validate/trade‑off architecture and design alternatives.
- Collaborate with systems architects, hardware engineering design teams and firmware/software design teams to bring up and test systems combining FPGA gateware, firmware, and networking functions.
- Drive trade‑off analysis to benefit customer experience and optimize target technology resources for cost, size, power, performance, and features.
- Utilize FPGA design tools including Vivado and Vitis with new System Verilog/VHDL RTL code and existing or new IP core integration.
This position requires that the selected candidate be a U.S. citizen to comply with U.S. government‑imposed requirements related to the nature of the work and/or location.
Basic Qualifications- Bachelor’s degree in Electrical Engineering or a related field.
- Experience identifying bugs in architecture, algorithms, functionality, and performance with strong debugging skills.
- Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing.
- 5+ years of experience developing FPGA RTL code in System Verilog or VHDL.
- Master’s degree in Electrical, Communications Engineering or a related field.
- Experience with formal verification techniques including abstraction and end‑to‑end checking.
- Experience with ARM and various DSP ISAs.
Amazon is an equal‑opportunity employer and does not discriminate on the basis of protected veteran status, disability, gender, sexual orientation, or other legally protected status.
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