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FPGA Verification Engineer - UVM​/SystemVerilog Expert

Job in El Segundo, Los Angeles County, California, 90245, USA
Listing for: Ateeca Inc
Full Time position
Listed on 2026-07-26
Job specializations:
  • Engineering
    Test Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 160000 USD Yearly USD 120000.00 160000.00 YEAR
Job Description & How to Apply Below

Ateeca Inc. is seeking a skilled ASIC/FPGA verification engineer in California to design and implement a comprehensive verification environment using UVM and System Verilog.

You will develop self-checking, reusable test benches, and build drivers, monitors, and scoreboards leveraging OO principles. The ideal candidate has a BS in engineering or related field and proven experience with high-speed SERDES interfaces (JESD
204C, PCIe, Ethernet) and System Verilog/SVA.

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