Electrical Design and Analyst Engineer

Chipton-Ross is seeking 10 Electrical Design and Analyst Engineer 5 for a contract opportunity in El Segundo, CA.

100% onsite

• Regular and predictable attendance is required.
• 5+ years of FPGA and/or ASIC design experience.
• strong Xilinx/AMD Vivado experience.
• Experience with Versal family devices.
• Verilog/System Verilog HDL proficiency required.
• Advanced FPGA implementation skills (synthesis, timing closure, constraints).

• Demonstrate strong digital hardware fundamentals.
• Exercise sound engineering judgment.
• Work independently with minimal oversight.
• Communicate clearly and proactively.
• Produce high-quality technical documentation.
• Take ownership of their work and deliver maintainable engineering solutions.
• Recruiters should prioritize candidates who can clearly explain their personal technical contributions, design decisions, debugging approach, and ownership of deliverables, rather than simply listing tools or technologies used on a project.

The contractor will inherit FPGA top-level design and be responsible for creating and adding new functional blocks and interfaces, including integrating third-party and in-house IP cores. Responsibilities include updating constraint files, performing synthesis, simulation, and Place & Route processes to ensure timing closure and design integrity. The candidate will program FPGA devices, primarily from the Xilinx Versal, Ultrascale, and Ultrascale+ families.

Additionally, the contractor will collaborate closely with the system engineering team to support hardware and software system integration as well as testing activities to deliver a fully functioning system. Therefore, on-site work is required.

Work statement is a non-managerial role, non-leadership role.

• 2+ years of FPGA design experience.
• strong Xilinx/AMD Vivado experience.
• Verilog/System Verilog proficiency.
• Advanced FPGA implementation skills (synthesis, timing closure, constraints).

Minimum of a Bachelor of Science degree from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 14 or more years' related work experience (e.g. PhD+9 years' related work experience, Master+12 years' related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.

• Full-Time/First Shift
• 8:00 AM - 4:30 PM
• Possible OT opportunities.

Applicants responding to this position will be subject to a government security investigation and must meet eligibility requirements by currently possessing the ability to view classified government information.