Chip Design Engineer, Nitro Chip Design Team

Description

Annapurna Labs, an Amazon team, designs and delivers high-end, custom silicon at the heart of AWS. Our chips don't just support the cloud; they define it. From Trainium, the purpose-built ML accelerator driving the next wave of AI innovation, to Graviton, the Arm-based server processor redefining price-performance for compute workloads, to Nitro, the advanced network and cloud management controller that underpins every AWS instance, Annapurna's products set the standard for the industry.

Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the world's largest cloud provider, in a dynamic, open, and fast-paced environment. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.

We are looking for exceptional engineers to join the top-tier team developing the next generation semiconductor platform based on a revolutionary architecture. You will participate in design activities, working on the next generation of our products.

You are invited to take part in developing, integrating, and deploying cutting-edge technologies - starting with identification and definition of project requirements, architecture, feature development, and collaboration with different groups. Your design will be integrated into the Nitro SoC, deployed on millions of servers worldwide. This is an opportunity to have a large-scale impact.

As a Chip Design Engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Watch these videos to learn more about Annapurna Labs and the Nitro project:

AWS re:

Invent 2025 - Keynote with Peter DeSantis and Dave Brown:

AWS re:

Invent 2025 - Deep Dive into the AWS Nitro System

• Full ownership of one or more IPs within the product:
• Micro-architecture
• RTL coding and debug
• Synthesis and timing closure
• Sign-off
• Supporting the Verification and Emulation teams:
  Test plan, Coverage review
• Ensuring that the chip meets quality and reliability standards
• Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design

• 4+ years of experience in chip design
• Hands-on experience in micro-architecture and RTL design (Verilog / System Verilog)
• BSc in Electrical Engineering/Computer Engineering/Computer Science

• Background in protocols (AXI, CHI, DDR, Networking, PCIe)
• knowledge of Network-on-Chip (NOC) architecture
• Experience with coherent and non-coherent fabric design
• Experience with the entire SoC cycle – Synthesis / STA / CDC / Lint
• Experience with Design Automation tools and techniques
• Advanced degree in related technical field

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Annapurna Labs Ltd.

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