Senior FPGA Engineer

Company Description

Join SEAKR Engineering, a leading‑edge provider of advanced electronics for space applications. Pushing the boundaries of technology on a mission to change the world for the better from space.

Seeking an FPGA Engineer who has extensive knowledge of digital circuit design, state machines, Boolean math and FPGAs.

• Complete multiple FPGA or ASIC designs using Verilog and/or VHDL, including at least one of moderate complexity.
• Demonstrate knowledge and development of a test bench with self‑checking and simulation (including back‑annotated timing) for given FPGA modules, top‑level FPGA, and system with multiple FPGAs.
• Understand FPGA technology differences (Xilinx vs Actel/Microsemi).
• Use FPGA process and development flows, especially flows using Synplify Pro, ISE, Vivado, and Libero.
• Scripting languages such as TCL or Python.
• Lead small teams to develop moderately complex systems according to program schedule expectations.

• FPGA design experience including thorough design documentation, completion and review of RTL blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design.
• Ability to solve digital lab debug problems with use of lab tools such as bench supplies, scopes and logic analyzers.

• Leadership skills and ability to provide support and technical direction to junior engineers.
• Clear written and verbal communication skills.
• Bachelor's degree in Electrical Engineering or Computer Science.
• At least 10+ years of FPGA experience.

Compensation:
Base pay range is $130,000‑185,000 depending on qualifications. SEAKR has very rich medical, dental and vision insurance plans, along with a generous 401(k) retirement plan. In addition to base salary, employees are eligible for a year‑end bonus. SEAKR offers a variety of paid leave, such as vacation, sick, bereavement, and FMLA.

US Citizenship Required.

SEAKR is an Equal Opportunity Employer – All your information will be kept confidential according to EEO guidelines.