Quantum Bump Integration Engineer

## Quantum Bump Integration Engineer Apply locations:
Essex Junction time type:
Full time posted on:
Posted Yesterday job requisition :
JR-2602346

Global Foundries Fab9 is seeking a highly skilled and motivated R&D bump process engineer to become part of our Quantum Advanced Packaging team. This role will entail driving next-generation interconnect scaling development efforts in our Advanced Packaging and Photonics Center (APPC) as well as with our partners. The primary responsibility of this position is to own development and integration of cryogenic, superconducting bumping processes enabling scalable quantum hardware packaging.
** About Global Foundries
** Global Foundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, Global Foundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit
** Job Summary
** Global Foundries Fab9 is seeking a highly skilled and motivated R&D bump process engineer to become part of our Quantum Advanced Packaging team.  This role will entail driving next-generation interconnect scaling development efforts in our Advanced Packaging and Photonics Center (APPC) as well as with our partners.  The primary responsibility of this position is to own development and integration of cryogenic, superconducting bumping processes enabling scalable quantum hardware packaging.
** Essential Responsibilities
*** Lead development of cryogenic-compatible bump interconnect technologies (e.g., indium, SnAg, Cu pillar, superconducting metals).
* Define and optimize bump structures, metallurgy, and process flows for superconducting integration.
* Establish process windows to ensure electrical, thermal, and mechanical stability at mK–K temperatures (CTE mismatch, fatigue, diffusion).
* Own end-to-end bump integration flows from wafer-level processing through assembly and qualification.
* Develop and implement integration schemes across 2.5D/3D architectures (interposers, TSVs, die-to-wafer flows).
* Drive alignment between unit processes (plating, litho, CMP, bonding) and system-level packaging requirements.
* Enable rapid prototyping, ensuring smooth movement of development lots.
* Support transition from R&D to pilot/high-volume manufacturing, ensuring process robustness.
* Develop integration strategies to improve yield, reduce defectivity, and enhance manufacturability.
* Identify and analyze failure modes (e.g., delamination, interconnect resistance shifts, cryo-induced stress).
* Apply DOE, statistical analysis, and root-cause methodologies to drive continuous improvement.
* Collaborate with test teams to characterize interconnect behavior at cryogenic temperatures (DC, RF/microwave).
* Ensure bump/interconnect design supports:  + Low-loss signal delivery  + Minimal thermal leakage  + Reduced crosstalk and noise (critical for qubit coherence)
* Partner with:  + Device / qubit engineers  + Cryogenic system teams  + Packaging & assembly teams  + Modeling and reliability teams
* Interface with vendors, tool suppliers, and OSAT partners for process development and scale-up.
* Drive next-generation bump scaling (pitch, height, material systems) aligned with quantum system scaling needs.
* Contribute to advanced packaging roadmap (e.g., high-density I/O, superconducting interposers).
* Scout and evaluate new materials, processes, and integration concepts.
* Work with design teams to translate system requirements into bump/interconnect specs (pitch, impedance, current limits).
* Support co-design of package + qubit + control electronics integration to reduce wiring bottlenecks and thermal load.
* Generate process documentation, specs, and integration guidelines.
* Deliver technical reports and updates to internal/external stakeholders.
* Support IP generation (invention disclosures, publications, conference contributions).
** Other Responsibilities
*** Perform all activities in a safe and responsible manner and support all…