Power and Performance Design Engineer

** Job Details:*
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* Job Description:

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* Designs, develops, and executes power and performance plans for IPs and SoCs. Identifies, builds, and maintains power, thermal, performance/watt optimizations, and characterizations for IPSoC power and performance goals. Conducts feature analysis from power and performance standpoint and drives to close any gaps between observed behavior and target on platforms in development. Provides recommendations for future architectures. Develops and enhances innovative tools for architectural performance analysis.

Develops methodologies and models to drive continuous improvements in optimization of power and performance configurations to meet market requirements. Ensures platform and its components are optimized for performance and power balance. Identifies power activity zones and works with design, architecture, binning/technology, and manufacturing teams on ways to meet power consumption goals. Works cross functionally on analysis, validation, and tuning of architectures and features that advance the state of art in performance and efficiency.

In this position, you will be a member of the Data Center Design Power and Performance (DCD PnP) team. This team is responsible for projecting and optimizing the power, binsplit, thermals, and power-limited performance for Data Center products including Xeon, Xeon-D, and Atom-based SoCs. We offer exciting opportunities to develop technical depth and leadership.

Role responsibilities include, but are not limited to:

+ Lead pre-silicon SoC Power projections for a Data Center product

+ Identify and drive power and thermal optimizations to meet SOC PnP goals

+ Build and maintain a power model using: architectural, design, and process specifications; historical power data; and current generation power estimates

+ Define segment-specific workloads for power and thermal specifications

+ Influence product definition starting from Pathfinding and Technology Readiness

+ Set workload-based power targets for IPs and SoCs that support the market requirements and drive teams to meet these goals

+ Deliver power data to partners to enable power delivery design, thermal modeling, and performance optimization

+ Audit power estimate quality from IP and SoC teams

+ Drive improvements to IP and SOC PnP methodology

+ Participate in SKU definition to match PnP capabilities with manufacturing and marketing needs

+ Collaborate worldwide with DCD PnP and cross-functional partner teams including SOC and IP Design, Architecture, Performance, Power Management, Power Delivery, Marketing, Planning, and Process

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* Qualifications:

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* You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Requirements:

+ The candidate must have a Bachelor's degree Electrical/Computer Engineering and 6+ years of experience or an equivalent combination of education and experience.

+ The ideal candidate's technical skills and experience will include:

+ Pre-Si power analysis and modeling

+ Power-aware design and identification of architectural, logical, and physical power reduction opportunities

+ Understanding of power/performance trade-offs and optimizations

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Experience with industry-standard power estimation tools and Intel's design environment

+ Programming or scripting, preferably in perl, python, or TCL

+ Knowledge of general computer architecture and silicon concepts

+ Thermal modeling and thermal spec for So Cs

Preferred Qualifications:

+ Skilled in effective communication, leadership, and teamwork

+ Analytically-driven with strong problem-solving abilities

+ A resourceful and disciplined self-starter

+ Thorough and detail-oriented

** Job Type:*
* Experienced Hire

** Shift:*
* Shift 1 (United States of America)

** Primary

Location:

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* US, California, Santa Clara

** Additional Locations:*
* US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro

** Business group:*
* Silicon and Platform Engineering Group (SPE):
Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

** Posting Statement:*
* All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

** Position of Trust*
* N/A

** Benefits*
* We offer a total compensation package that ranks among the best in the industry. It consists of…