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Member of Technical Staff, AI-optimized Physical​/Platform Architect

Job in Folsom, Sacramento County, California, 95630, USA
Listing for: 1000 Micron Technology, Inc.
Full Time position
Listed on 2026-05-31
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 177000 - 309000 USD Yearly USD 177000.00 309000.00 YEAR
Job Description & How to Apply Below

Job Overview

As a Member of Technical Staff in Micron's AI-optimized Memory Architecture team, you will contribute to defining the physical and platform architecture of tightly coupled, high-performance memory solutions for AI workloads. You will apply expert knowledge to analyze electrical and physical architecture trade-offs in close collaboration with peers across architecture, design, and packaging teams.

Responsibilities
  • Architect and specify thermal management, power delivery, and on/off-chip interfaces for high-performance stacked memories.
  • Collaborate with experts across SoC/memory design, memory systems architecture, and advanced packaging to explore trade-offs and define architectures and requirements.
  • Compose and maintain clear architecture documentation that aligns design intent across teams.
  • Analyze and reason across multiple domains to find optimal cross-domain solutions.
  • Influence design decisions through data-driven system analysis and clear communication.
Minimum Qualifications
  • Experience with analog and digital design, including architecture trade-off analysis, specification development, definition, and prototype design.
  • Experience with high-performance memory devices and systems such as HBM.
  • Experience analyzing thermal performance with thermal modeling tools (e.g., Flo Therm).
  • Experience with architecture, simulation, and design of 2.5D and 3D IO interfaces on modern foundry nodes.
  • Experience with power delivery and thermal architectures, trade-offs, constraints, and challenges.
Preferred Qualifications
  • Contributions to physical, thermal, and power delivery solutions for stacked architectures.
  • Experience with advanced packaging building blocks and techniques.
  • Experience with high-efficiency stacked SoC and/or DRAM architectures and designs.
Education

A Master’s or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience.

Experience

5+ years of proven industry experience delivering silicon-demonstrated SoC hardware designs, stacked memory or logic designs, or complex packaging architectures.

Salary Range

$ - $ per year (US base salary).

Benefits

Micron offers medical, dental, and vision plans, income protection, paid family leave, paid time-off, holidays, and other benefit programs designed to support personal wellbeing and professional growth.

EEO Statement

Micron is a proud equal-opportunity employer and an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws.

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