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HBM SoC Design Engineer

Job in Folsom, Sacramento County, California, 95630, USA
Listing for: Micron Technology, Inc
Full Time position
Listed on 2026-06-02
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 60000 - 80000 USD Yearly USD 60000.00 80000.00 YEAR
Job Description & How to Apply Below

HRB SoC Design Engineer

We transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Role Overview

As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets.

Key Responsibilities
  • Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die.
  • Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic).
  • Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations.
  • Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure.
  • Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues.
  • Contribute to design documentation, block specifications, and design reviews.
  • Collaborate multi‑functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds.
Minimum Qualifications
  • Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field, with a minimum of 10 years of experience in a related field.
  • Proficiency in System Verilog/Verilog and familiarity with SoC integration methodologies.
  • Experience with the RTL‑to‑GDS flow, including synthesis, static timing analysis, and developing sign‑off considerations.
  • Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens.
  • Programming or scripting experience (e.g., Python, TCL, Perl, or shell scripting).
Preferred Qualifications
  • Experience with HBM, DRAM, or memory‑centric SoC designs.
  • Familiarity with high‑speed interfaces, clocking strategies, reset architectures, and power management concepts.
  • Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug.
  • Experience with hardware emulation or acceleration platforms (e.g., Palladium, Veloce, Zebu).
Benefits

Micron offers a choice of medical, dental and vision plans in all locations, and benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Micron also provides a robust paid time‑off program and paid holidays.

Micron is proud to be an equal‑opportunity workplace and an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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