Mixed Signal​/PLL Post - Silicon Validation Engineer

Overview

AMD is searching for an experienced Circuit Design Engineer to join the fast-growing PLL design team, responsible for defining, specifying, and implementing current and future advanced PLL IPs powering AMD products.

Join a dynamic team and boost your personal career in a challenging and fascinating area. We value innovation, collaboration, and diverse perspectives as we shape the future of AI and beyond.

As a Circuit Design Engineer, you will contribute to PLL block design, verification, and silicon evaluation in collaboration with cross-functional teams.

• Solid knowledge of mixed-signal circuit design in FinFET Technology, specifically PLLs and related subblocks (VCO, adaptive clocking, charge-pump, dividers, state machines, LDO, feedback and compensation techniques, bandgap, TDC, interpolator circuits, high-speed buffers).
• Solid knowledge of industry-standard analog design tools and practices.
• Good knowledge of physical design, STA, and methodology scripts (Tcl); knowledge of Perl and Python.
• Quality-oriented mindset with strong communication skills and team spirit.

• Design complex building blocks of a PLL, including architecture development and transistor-level circuit design.
• Run pre-tapeout verification to confirm performance, power, reliability and timing requirements.
• Collaborate with mask design engineers to deliver physical design and define production/bench-level test plans with post-silicon characterization groups for silicon evaluation.
• Lead and mentor junior engineers.

• Experience in the semiconductor industry.
• Experience with FinFET and Dual Patterning nodes (16/14/10/7nm).
• Hands-on design experience in analog and mixed-signal PLLs, ADC/DAC interfaces, VCO, LDO, bandgap, charge pump, op-amps, interpolator circuits.
• Familiarity with digital PLL techniques, TDC, DSP as related to digital PLLs, Dual charge-pump PLLs, Fractional-N PLLs, and spread-spectrum PLLs is a plus.
• Proficiency with Cadence tools (ADE-L, ADE-XL) and Monte-Carlo, noise, aging, EM and IR drop simulations; stability analysis. Helic/EMX is a plus.
• Experience with Spectre, HSPICE, AFS, MATLAB, System Verilog, Python; ability to understand DRC/LVS results with verification tools (Calibre, ICV, or similar).
• Proficiency in scripting languages (Perl, Python, MATLAB) is a plus.
• Strong analytical/problem-solving skills with attention to detail; able to work effectively in a team and drive tasks to completion.

• Master’s in Electrical Engineering or equivalent preferred.

Folsom, CA

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters or recruitment agencies. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to protected characteristics. We encourage applications from all qualified candidates and will accommodate applicants’ needs under applicable laws.