Analog Mixed-Signal Design Engineer

About the Role

Intel is shaping the future of technology to create a better future for everyone. As an Analog Mixed‑Signal Design Engineer
, you will contribute to the design, development, and optimization of analog and mixed‑signal integrated circuits that enable next‑generation client computing platforms.

In this role, you will work on advanced semiconductor technologies and analog IP solutions that support Intel's industry‑leading processors and platforms. You will collaborate with multidisciplinary engineering teams to develop innovative circuit solutions, optimize performance, and help deliver high‑quality silicon products that power millions of devices worldwide.

This is an excellent opportunity for an engineer who enjoys solving complex technical challenges, driving innovation, and contributing to cutting‑edge products at the forefront of computing and AI technologies.

• Design, develop, and optimize analog circuits in advanced process nodes for analog and mixed‑signal IPs.
• Create circuit floor plans, perform circuit design, extract chip parameters, and simulate analog behavior models.
• Develop and execute test plans to verify designs against circuit and block microarchitecture specifications.
• Evaluate test results to ensure functionality while optimizing circuits for power, performance, area, timing, and yield goals.
• Collaborate cross‑functionally to report design progress and resolve performance and circuit design challenges.
• Optimize circuit performance, power, area, and reduce leakage to meet system‑level goals.
• Work closely with architecture and layout teams to design circuits for functionality, robustness, and electrical capabilities.
• Contribute to the integration of analog blocks into system‑on‑chip (SOC) designs.

• Strong analytical and problem‑solving skills with the ability to address complex circuit design challenges.
• Intellectual curiosity and a passion for innovation and continuous learning.
• Effective verbal and written communication skills.
• A collaborative mindset and ability to build productive partnerships across teams.
• Ownership and accountability for delivering high‑quality technical results.
• Strong attention to detail while balancing execution against project milestones.
• Adaptability and resilience in a dynamic and fast‑paced engineering environment.
• Commitment to continuous improvement and engineering excellence.

At Intel, your work helps create technology that improves the lives of billions of people worldwide. You will collaborate with some of the industry’s leading engineers, work on advanced semiconductor technologies, and contribute to innovations that shape the future of computing, AI, and connected devices.

We foster an inclusive culture where diverse perspectives drive innovation, empower career growth, and enable breakthrough discoveries.

Intel invests in our people and offers a complete and competitive package of benefits for employees and their families through every stage of life.

See Intel Benefits for more details.

You must possess the below minimum qualifications to be considered for this position. Preferred qualifications are considered a plus factor.

• Bachelor’s degree in Electrical/Computer Engineering, Electronics Engineering, or related discipline field and 4+ years of experience. Or a Master’s degree in the same field with 2+ years of experience.
• Designing, developing, and building analog circuits in advanced process nodes for analog and mixed‑signal IPs.
• Experience with simulation tools such as Cadence ADE or Synopsys Prime Wave, and layout tools such as Cadence Virtuoso.
• Verify functionality and optimize circuits for power, performance, area, timing, and yield goals.

• Ph.D. in Electrical/Computer Engineering, Electronics Engineering, or related discipline.
• Exposure to device physics, power delivery, and power integrity domains.
• Design knowledge of Thermal sensors.
• Design knowledge of Fuses.

Experienced Hire

Shift 1 (United States of America)

US, California, Folsom

US, California, Santa Clara

All qualified…