IP Logic Design Engineer
Job in
Folsom, Sacramento County, California, 95630, USA
Listed on 2026-07-20
Listing for:
Jobtailor
Full Time
position Listed on 2026-07-20
Job specializations:
-
Engineering
Electronics Engineer, Hardware Engineer, Test Engineer, Systems Engineer
Job Description & How to Apply Below
Responsibilities
- Develop logic design and register transfer level (RTL) coding for IP blocks using languages such as System Verilog and Verilog
- Optimize logic designs to meet power, performance, area, and timing goals
- Participate in defining architecture and microarchitecture features for IP blocks
- Collaborate with cross-functional teams to review verification plans, ensuring comprehensive validation of design features
- Identify and resolve failures in RTL tests, implementing corrective measures to ensure design correctness
- Apply power‑saving techniques such as clock gating and power gating to enhance energy efficiency
- Support System‑on‑Chip (SoC) customers with the integration and verification of IP blocks, ensuring high‑quality handoff and smooth execution
- Use industry‑standard tools and methodologies to ensure design integrity and compliance with quality assurance standards
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 0 to 1 or more years of experience with a Bachelor's degree, or 0 years of experience with a Master's degree
- Proficiency in RTL design and development using System Verilog and Verilog
- Hands‑on experience with clock design, clock gating, and clock domain crossing
- Experience with UPF low‑power coding and debugging techniques
- Familiarity with problem‑solving approaches for power, performance, area, and timing optimization
- Master's degree in Electrical Engineering, Computer Engineering, or related field (preferred)
- Understanding of microarchitecture design principles and strategies (preferred)
- Strong technical collaboration skills to work effectively in a team environment (preferred)
- Demonstrated ability to adapt to evolving technologies and industry trends (preferred)
- System Verilog
- Verilog
- RTL design
- Logic design
- Power optimization
- Performance optimization
- Area optimization
- Timing optimization
- UPF low‑power coding
- Clock gating
- Technical collaboration
- Problem‑solving
- Adaptability
- Bachelor's degree in Electrical Engineering
- Bachelor's degree in Computer Engineering
- Master's degree in Electrical Engineering
- Master's degree in Computer Engineering
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