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Senior SoC Physical Design Engineer - Tapeout & PPA

Job in Folsom, Sacramento County, California, 95630, USA
Listing for: Micron Memory Malaysia Sdn Bhd
Full Time position
Listed on 2026-07-24
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 177000 - 334000 USD Yearly USD 177000.00 334000.00 YEAR
Job Description & How to Apply Below

Micron Technology in Folsom, CA is looking for a senior SoC Physical Design Engineer to drive implementation from netlist to GDSII for advanced memory/SoC blocks. You will work with RTL, verification, DFT, IP, packaging and manufacturing to ensure top‑level integration with strong PPA and robust signoff.

The role demands hands‑on execution, ownership of blocks or top‑level integration, and strong scripting skills. A track record of tapeouts on leading foundries like TSMC is highly valued.

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Position Requirements
10+ Years work experience
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