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Senior Design Verification Engineer - Full-Chip & FPGA
Job in
Folsom, Sacramento County, California, 95630, USA
Listed on 2026-08-22
Listing for:
Redolent Infotech Pvt. Ltd.
Full Time
position Listed on 2026-08-22
Job specializations:
-
Engineering
Test Engineer, Electronics Engineer, Hardware Engineer
Job Description & How to Apply Below
Redolent Infotech Pvt. Ltd. in Folsom, CA seeks a Design Verification Engineer to drive full-chip verification using industry-standard methodologies.
You will develop UVM/OVM/VMM test benches, verify interfaces such as PCIe, NoC/AXI, DDR4, and work with tools like Synopsys VCS, Cadence IES, and formal checkers.
Candidates should have strong knowledge of verification techniques, SystemC-based modeling, and FPGA programming experience.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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