Mixed Signal Digital Design Lead

Job Summary

Senior Mixed‑Signal Lead to spearhead the architecture and design of high‑performance clocking solutions, including PLLs, FLLs, and DLLs, for next‑generation silicon. In this leadership role you will be responsible for the full lifecycle of analog timing IPs and post‑silicon validation, driving trade‑offs between analog and digital implementations, and ensuring seamless integration into large‑scale SoCs.

• Lead the design of high‑performance clocking solutions and post‑silicon validation.
• Manage external IP vendors and define internal design methodologies.
• Collaborate closely with Analog Design and Physical Design teams to mitigate noise coupling and power‑supply integrity issues.
• Drive trade‑offs between analog and digital implementations of clocking circuits.
• Perform jitter decomposition, phase‑noise analysis, and silicon bring‑up.

• Bachelor’s degree and 8+ years of experience in mixed‑signal design with a focus on low‑jitter, low‑power frequency synthesis in advanced process nodes (N5, N3P).
• Experience with PLL, FLL, and DLL design.
• Strong understanding of jitter and phase‑noise analysis; familiarity with silicon bring‑up.
• Proficiency in Matlab and Arcsim (desired).
• Excellent collaboration and leadership skills, with ability to manage vendors and cross‑functional teams.

• Annual base salary range: $108,000 – $172,800.
• Discretionary annual bonus; equity grants and annual equity awards.
• Medical, dental, and vision plans; 401(k) with company match; ESPP; EAP.
• Paid holidays, sick leave, vacation, and Paid Family Leave.

Broadcom is a proud equal‑opportunity employer. We will consider qualified applicants regardless of race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status, or any other characteristic protected by federal, state, or local law. We also consider qualified applicants with arrest and conviction records consistent with local law.