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Senior VLSI​/ASIC Design Engineer - Timing & SI Expert

Job in Fort Collins, Larimer County, Colorado, 80523, USA
Listing for: Broadcom Inc.
Full Time position
Listed on 2026-08-28
Job specializations:
  • Engineering
Salary/Wage Range or Industry Benchmark: 129400 - 207000 USD Yearly USD 129400.00 207000.00 YEAR
Job Description & How to Apply Below

Broadcom Inc. is seeking a senior engineer with a deep background in VLSI/ASIC timing and design. You will work on significant development and support issues, analyzing complex data and coordinating with teams across time zones.

Required:

BS/MS in EE/CE with 10+ years (MS) or 12+ years (BS); TCL, Python, or Ruby; experience with Prime Time/Cadence and SPICE analysis. Excellent communication across geographies is essential.

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Position Requirements
10+ Years work experience
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