CPU​/AI​/SOC Physical Design Lead

Overview

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible.

We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

This role is hybrid
, based out of Santa Clara, CA;
Austin, TX; or Fort Collins, CO
.

Tenstorrent s Physical Engineering group is looking for a Physical Design Engineer to Lead the design of cutting-edge CPUs and AI/ML chips from synthesis through tapeout. In this role, you’ll own high-performance IP implementation and work closely with front-end, architecture, and backend teams to push power, performance, and area boundaries.

• Lead the design of cutting-edge CPUs and AI/ML chips from synthesis through tapeout.
• Own high-performance IP implementation and collaborate with front-end, architecture, and backend teams to push power, performance, and area boundaries.

• Who You Are — An experienced Physical Design Engineer with a background in SoC, CPU, GPU, or AI/ML implementations.
• Confident managing backend execution from RTL handoff through signoff and tapeout.
• Skilled in timing closure, floor planning, and physical implementation techniques.
• Comfortable writing scripts and debugging across design hierarchies.

• What We Need — Engineers with hands-on experience using Innovus, Primetime, Red Hawk, and similar tools.
• Deep understanding of PnR, timing analysis, area and power optimization, and ECO closure.
• Ability to define physical design requirements and partner effectively with RTL and architecture teams.
• Familiarity with low-power techniques and experience working at advanced technology nodes.

• The end-to-end physical implementation process for next-generation AI and CPU architectures.
• How to run and evaluate experiments across RTL, synthesis, and layout to optimize for PPA.
• How expert teams collaborate across RTL, verification, DFT, and software to deliver high-impact silicon.
• Best practices for automating flows and solving challenges at deep sub-micron nodes.

Note:

Compensation details are provided for budgeting purposes; actual offers depend on experience, skills, education, and location.

Tenstorrent offers a highly competitive compensation package and benefits. We are an equal opportunity employer.

This description may include information about export controls. Any offer of employment may be contingent upon eligibility to access technology and compliance with applicable laws.