FPGA Design Engineer - TS​/SCI w​/FS Poly Clearance Required

FPGA Design Engineer

Our client is looking for a customer-focused team player working on-site in a mission-oriented environment. The candidate must be a self-starter, possess good communication skills, and be willing to interface with multiple teams throughout the design process. We are currently seeking FPGA design engineers with emphasis on FPGA or ASIC design, development and verification using System Verilog, Verilog or VHDL. The design engineer will work closely with software and system engineers to conceptualize, document, design, code, verify and lab-debug ASIC, FPGA and embedded firmware designs.

The ideal candidate will be adaptable, motivated, customer oriented, able to lead a small team and willing to mentor others while learning new technologies.

Qualifications:

• Must currently possess an active TS/SCI Clearance with Full-Scope Polygraph (FSP)
• Designs and tests new integrated circuits and hardware components for a wide variety of applications and research
• Designs, documents, and develops code (to include firmware) for hardware devices such as Application Specific Integrated Circuit (ASIC) and Field Programmable Gate Array (FPGA) hardware
• Analyzes the function of existing integrated circuits and hardware components for the purpose of reverse engineering the hardware and firmware
• Conducts the necessary hardware engineering and related functions to modify and adapt vendor-manufactured hardware to meet specific needs and contingencies
• Assist with designing new products and processes and improving and maintaining existing products
• Communicate with the other engineering personnel to coordinate the interrelated design and assure project completion
• Conduct design analysis on components and/or assemblies to assist in the development process by ensuring designs are cost efficient, able to be manufactured, and reliable
• Design new products and processes and improving and maintaining existing products
• Must have experience with HDL simulators such as Questa Sim, Model Sim, Incisive or other industry standard simulators

Location is onsite at Fort Meade, MD.

Education/

Experience:

Multiple openings for Junior, Senior, Principal and Sr. Principal Engineers:
Minimum three (3) years’ experience as a Design Engineer in integrated circuit or microelectronic component design or reverse engineering of the same is required. Bachelor’s degree in Electrical Engineering or Computer Engineering from an accredited college or university is required. Five (5) years of additional hardware design engineering experience may be substituted for a bachelor’s degree.