FPGA​/ASIC Design Engineer - TS​/SCI w​/ FS Poly Clearance Required

FPGA Design Engineer

Our client is looking for a customer-focused team player working on-site in a mission-oriented environment. The candidate must be a self-starter, possess good communication skills, and be willing to interface with multiple teams throughout the design process. We are currently seeking FPGA design engineers with emphasis on FPGA or ASIC design, development and verification using System Verilog, Verilog or VHDL. The design engineer will work closely with software and system engineers to conceptualize, document, design, code, verify and lab-debug ASIC, FPGA and embedded firmware designs.

The ideal candidate will be adaptable, motivated, customer oriented, able to lead a small team and willing to mentor others while learning new technologies.

Qualifications:

Must currently possess an active TS/SCI Clearance with Full-Scope Polygraph (FSP). Experience using VHDL RTL coding (for design and/or analysis of digital circuits). Experience with FPGA design, synthesis, P&R tools (ex Vivado, Quartus). Experience utilizing Verilog/System and Verilog test bench development. Experience working with Linux/Windows OS. Knowledge of design simulation tools (Mentor, Cadence, Synopsys - 1 or more). Strong oral/written communication.

Location is onsite at Fort Meade, MD.