Electrical Engineer II: FPGA
Listed on 2026-04-17
-
Engineering
Systems Engineer, Electronics Engineer, Electrical Engineering, Software Engineer
FPGA Engineer II
Location:
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
Date Posted:
Country:
United States of America
Position Role Type:
Onsite
U.S. Citizen, U.S. Person, or Immigration Status Requirements:
The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.
Security Clearance Type:
DoD Clearance:
Secret
Security Clearance Status:
Active and existing security clearance required after day 1
At Raytheon, the foundation of everything we do is rooted in our values and a higher calling–to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today’s mission and stay ahead of tomorrow’s threat. Our team solves tough, meaningful problems that create a safer, more secure world.
The Multi-Product Power & Digital (MPD) department designs FPGAs, circuit cards, and electronics subassemblies for a range of products including missiles/effectors, radars, and electronic warfare systems. The team leverages digital, analog, and power design skills to provide support throughout the product lifecycle from architecture and design through production and sustainment.
The MPD department is seeking an FPGA Engineer II to join our team. In this role, you will leverage advanced technologies to create cutting‑edge solutions for sensor and effector products. You will partner with experienced, multidisciplinary teams to define requirements, develop architectures, execute detailed design and simulations, and perform integration and verification tasks. You will document your designs within the appropriate configuration management tools and provide comprehensive engineering support throughout the product lifecycle.
WhatTo Expect
- Provide full lifecycle support of production quality FPGA designs for one or more major vendors and device families including: AMD (Xilinx), Altera, and Microchip (Microsemi).
- Generate FPGA designs for the following applications: gigabit serial interfaces, Radio Frequency (RF) DSP, controls, data links, embedded processing and processor interfaces.
- Assist with architecture development of FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS).
- Design and code in VHDL for reliability and maintainability.
- Support design verification utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage.
- Understand and report execution status to the planned budget and schedule using an agile framework.
- Create complete documentation including requirements, verification plan, and user’s guides.
- Function as an individual contributor.
- Clearly present your work product to leadership.
- Engage in professional growth and development.
- Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 2 years of prior relevant experience.
- Experience to include one or more of the following:
- FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding)
- Experience with AMD (Xilinx), Altera and/or Microchip (Microsemi) devices and with tools such as AMD Vivado, Altera Quartus Prime Pro or Libero.
- Hands‑on experience with integration and debug of FPGA/ASIC in a lab environment.
- Experience with source code management, design reviews, and code release in a team development environment.
- One or more advanced degrees in Electrical Engineering or a related Science, Technology, Engineering, or Mathematics (STEM) major. A suitable degree may be counted as 2 years of work experience.
- FPGA/ASIC design experience in one or more of the following areas:
- Embedded systems design using ARM, Microblaze, or NIOS processors.
- Gigabit serial interfaces and multi-gigabit transceivers (MGTs).
- Constrained random verification in UVM using System Verilog.
- Experience with High Level Synthesis (HLS).
- Experience with vector processors and/or GPUs.
- Experience with timing closure, clock domain crossing and reset…
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