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Principal FPGA​/ASIC Verification Engineer; Onsite

Job in Fort Wayne, Allen County, Indiana, 46804, USA
Listing for: Prattwhitney
Full Time position
Listed on 2026-07-09
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 120000 USD Yearly USD 90000.00 120000.00 YEAR
Job Description & How to Apply Below
Position: Principal FPGA/ASIC Verification Engineer (Onsite)

Position Overview

Principal Electrical or Computer Engineer – Onsite, Fort Wayne, IN (US‑Citizen required). Requires an active and transferable U.S. government‑issued security clearance (DoD Secret). This role leads the design, implementation, and verification of advanced test benches for a portfolio of high‑performance digital ASICs and FPGAs, supporting critical Mission Systems programs within the Microelectronics Technology team.

Responsibilities
  • Verification environment architecture and design using System Verilog with OVM/UVM
  • Creation of written test plan, test cases, code coverage tracking, and functional coverage tracking
  • Testbench development for the verification of RTL blocks using VHDL or System Verilog
  • Recommend new tools and practices for continuous improvement in the group’s ASIC/FPGA verification flow
  • Contribute to engineering estimates for new program pursuits
  • Provide technical leadership for project verification teams, breaking down work, planning activities, and reporting status
Qualifications
  • Typically requires a STEM degree and minimum 8years of relevant experience, or an advanced degree and minimum 5years of experience
  • Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment (at least 4years)
  • Proven ability to design, implement, and execute verification test benches for RTL blocks using VHDL and/or System Verilog
  • Experience with chip‑level verification methodologies (constrained‑random testing, functional coverage analysis, assertion‑based verification)
  • Experience using revision control systems such as Git or Subversion
  • Demonstrated ability to work independently and mentor junior engineers
  • Preferred:
    Experience with ASIC/FPGA lab validation and debug, familiarity with DFT, manufacturability, and production test concepts, proficiency with Unix/Linux, scripting or software development
Security Clearance

U.S. citizenship required. Active and transferable DoD Secret security clearance required prior to start date.

EEO Statement

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status.

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