FPGA Engineer

SWISSto
12 is one of the world’s fastest-growing aerospace companies, evolving from its pioneering use of 3D printing technologies for high-performance Radio Frequency (RF) products and applications to recently announcing the manufacture of entire geostationary telecom satellites, called Humming Sat, that define a new category in space. Humming Sat is the world’s first commercial telecom GEO Small Sat developed in collaboration with the European Space Agency (ESA).

Its uniquely compact size combined with highly capable telecom payloads allows telecommunications operators to deploy a cost-efficient, compact, and agile asset without sacrificing performance or security. Humming Sat has been selected by Intelsat to build the I-45 satellite, by Inmarsat to build three I-8 satellites, and recently by Astrum Mobile to build the NEASTAR-1 satellite. SWISSto
12 is also a leading provider of Radio-Frequency (RF) products and sub-systems for satellite communication and remote sensing applications. The company’s patented 3D printing technologies and associated product designs are unique to deliver lightweight, compact, highly performing, and competitive RF products. We are seeking a highly motivated mid-level FPGA Engineer with strong experience in digital signal processing (DSP) and communications systems to support the development of advanced software-defined radio (SDR) and next-generation wireless platforms.

This role focuses on implementing high-performance, real-time signal processing pipelines on FPGA and SoC platforms used in modern communication systems, including 5G NTN. The ideal candidate will have hands-on experience with FPGA design for high-throughput data paths, integration with high-speed RF data converters, and system-level understanding of wireless communication architecture.

• Bachelor’s or Master’s degree in Electrical Engineering or related field.
• 5–7 years of experience in FPGA/ASIC design and development and embedded platforms.
• Strong understanding of digital signal processing (DSP) principles.
• Proficiency in RTL design (VHDL, Verilog, or System Verilog).
• Experience with FPGA tool chains (e.g., Xilinx Vivado/Vitis, Intel Quartus).
• Experience implementing high-speed digital interfaces (e.g., JESD
  204, LVDS, SERDES).
• Familiarity with MATLAB/Simulink or Python for algorithm development and modeling.
• Understanding of fixed-point arithmetic and hardware-efficient DSP implementation.

• Bachelor’s or Master’s degree in Electrical Engineering or related field.
• 5–7 years of experience in FPGA/ASIC design and development and embedded platforms.
• Strong understanding of digital signal processing (DSP) principles.
• Proficiency in RTL design (VHDL, Verilog, or System Verilog).
• Experience with FPGA tool chains (e.g., Xilinx Vivado/Vitis, Intel Quartus).
• Experience implementing high-speed digital interfaces (e.g., JESD
  204, LVDS, SERDES).
• Familiarity with MATLAB/Simulink or Python for algorithm development and modeling.
• Understanding of fixed-point arithmetic and hardware-efficient DSP implementation.

• Experience with wireless communication systems (LTE, 5G ).
• Knowledge of PHY-layer signal processing (OFDM, MIMO, channel estimation, synchronization).
• Experience with RFSoC or similar integrated RF + FPGA platforms.
• Familiarity with beamforming architectures (digital or hybrid).
• Experience with embedded SoC environments (ARM cores, Linux, bare-metal).
• Exposure to high-speed networking protocols (e.g., Ethernet, eCPRI).
• Experience with hardware/software co-design and system partitioning.
• Familiarity with version control (Git) and CI/CD workflows for FPGA development.
• Familiarity with FPGA development for space applications.

• Design, implement, and verify FPGA-based DSP algorithms for communications systems (e.g., channelization, modulation/demodulation, filtering, beamforming).
• Develop high-performance RTL (VHDL/Verilog/System Verilog) for real-time signal processing pipelines.
• Implement and optimize data paths involving high-speed ADCs/DACs (e.g., JESD
  204B/C interfaces).
• Integrate FPGA designs within heterogeneous SoC platforms (e.g., Xilinx/AMD Versal, Zynq,…