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DSP Engineer

Job in Foster City, San Mateo County, California, 94420, USA
Listing for: SWISSto12 SA
Full Time position
Listed on 2026-08-31
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Embedded Software Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 180000 USD Yearly USD 120000.00 180000.00 YEAR
Job Description & How to Apply Below

SWISSto
12 is one of the world’s fastest-growing aerospace companies, evolving from its pioneering use of 3D printing technologies for high-performance Radio Frequency (RF) products and applications to recently announcing the manufacture of entire geostationary telecom satellites, called Humming Sat, that define a new category in space.

Humming Sat is the world’s first commercial telecom GEO Small Sat developed in collaboration with the European Space Agency (ESA). Its uniquely compact size combined with highly capable telecom payloads allows telecommunications operators to deploy a cost-efficient, compact, and agile asset without sacrificing performance or security. Humming Sat has been selected by Intelsat to build the I-45 satellite, by Inmarsat to build three I-8 satellites, and recently by Astrum Mobile to build the NEASTAR-1 satellite.

SWISSto
12 is also a leading provider of Radio-Frequency (RF) products and sub-systems for satellite communication and remote sensing applications. The company’s patented 3D printing technologies and associated product designs are unique to deliver lightweight, compact, highly performing, and competitive RF products.

We are seeking a highly motivated senior DSP engineer to join our team to help develop, design, implement, and test advanced FPGA based deployments for high-performance communications payloads. The ideal candidate will have deep experience with signal processing algorithm development relative to software defined radios and communications systems, as well as practical implementation experience on the latest FPGA and System on Chip platforms.

This role requires strong technical ownership, hand-on development capabilities and the ability to translate system level requirements into executable code.

Job requirements
  • Master of Science in Electrical Engineering with focus on digital signal processing.
  • Strong background in communication theory and wideband digitization.
  • 7+ years of hands-on FPGA design and development experience for complex digital systems.
  • Strong proficiency in synthesizable RTL design.
  • Experience with Vivado, Vitis, equivalent tool chains.
  • Ability to partition problems and to define block level HW architectures, and extensive knowledge of VHDL.
  • Knowledge of real time implementation of complex DSP parallel processing structures.
  • Work with System-on-Chip FPGA platforms, including embedded processors, DMA engines, memory-mappedcontrol interfaces, Linux-based software stacks, and hardware/software partitioning.
  • Strong lab debugging skills utilizing high speed oscilloscopes, signal generators, spectrum analyzers, logic analyzers, FPGA debug tools.
  • Master of Science in Electrical Engineering with focus on digital signal processing.
  • Strong background in communication theory and wideband digitization.
  • 7+ years of hands-on FPGA design and development experience for complex digital systems.
  • Strong proficiency in synthesizable RTL design.
  • Experience with Vivado, Vitis, equivalent tool chains.
  • Extensive high speed serial interface design – JESD
    204B/C, PCIe Gen3/4, Ethernet, Aurora, equivalent SERDES protocols.
  • Ability to partition problems and to define block level HW architectures, and extensive knowledge of VHDL.
  • Knowledge of real time implementation of complex DSP parallel processing structures.
  • Work with System-on-Chip FPGA platforms, including embedded processors, DMA engines, memory-mappedcontrol interfaces, Linux-based software stacks, and hardware/software partitioning.
  • Strong lab debugging skills utilizing high speed oscilloscopes, signal generators, spectrum analyzers, logic analyzers, FPGA debug tools.
Additional preferred qualifications:
  • Working knowledge of 5G, LTE related wireless PHY layer concepts including OFDM, FFT/iFFT processing, channel coding, synchronization and DFE processing.
  • Experience with AMD RFSoC, Zynq Ultrascale+, Versal AI Core, Microchip Polarfire development.
  • Experience with ECSS-E-ST-20-40C and ECSS-Q-ST-60 standards.
Job responsibilities
  • Research and design of fast and efficient hardware realizable DSP algorithms to implement functions such as filters, equalizers, timing/carrier recover loops, multi-rate structures (Polyphase Filter…
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