Design Verification Engineer - Cellular SoC & UVM Expert

A leading technology company in Virginia seeks a Design Verification Engineer to ensure quality in innovative cellular systems. This role involves creating verification environments, developing test cases, and collaborating with multi-functional teams to enhance customer experiences globally. Candidates should have experience in ASIC design verification, proficiency in System Verilog and UVM, plus strong problem-solving skills. Exceptional opportunities to deepen expertise across cellular protocols and debug methodologies.

Compensation ranges from $120,300 to $181,200 based on experience and qualifications.
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