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CMOS Integrated Circuit CAD Engineer

Job in Goleta, Santa Barbara County, California, 93116, USA
Listing for: Raytheon
Full Time position
Listed on 2026-05-16
Job specializations:
  • Engineering
    Systems Engineer
Salary/Wage Range or Industry Benchmark: 60000 - 80000 USD Yearly USD 60000.00 80000.00 YEAR
Job Description & How to Apply Below

Location:

US-CA-GOLETA-B01 ~ 6825 Cortona Dr ~ BLDG B01
Work type:
Onsite
Citizenship requirement: U.S. citizenship required

Raytheon Vision Systems is seeking to hire a motivated CMOS IC CAD Engineer to join the Integrated Circuits Design Team. You will be part of a talented team designing next‑generation digital visible and infrared image sensors, collaborating in a fast‑paced multidisciplinary environment to develop cutting‑edge image sensor products.

Responsibilities
  • Install, configure, and support foundry Process Design Kits (PDKs)
  • Custom edit foundry technology files to define and implement RVS ICDC design methodologies
  • Provide expert support to designers in debugging tools, foundry technology files, and design errors, as well as develop flows and scripts to improve team productivity
  • Support and maintain CAD tools used by IC designers including Virtuoso, DRC/LVS/PEX/PERC verification tools, extractions, and spice simulation tools
  • Work with CAD tool vendors to identify and resolve bugs, improve tool usability, and evaluate new tools and features
  • Develop infrastructure to support design work in new process technologies
  • Act as Linux, Subversion (SVN) version control, and Keysight (Cliosoft) Design Data Management (SOS) administrator
  • Communicate with vendors and foundry suppliers
Required Qualifications
  • Degree in Science, Technology, Engineering or Mathematics (STEM); less than 2 years of prior experience
  • Experience with MOSFET device behavior, CMOS layout including front‑end device structures, and VLSI design
  • Experience installing, configuring, validating, and customizing foundry Process Design Kits (PDKs)
  • Experience in debugging SVRF (Standard Verification Rule Format) scripting language to define or modify DRC & DFM rules (including density fill) in Siemens (Mentor Graphics) Calibre tool
  • Experience using Calibre to support, enhance, and debug foundry design rule checks (DRC) and antenna rule decks; writing automation and workflow scripts in Perl, C‑Shell, and TCL within Unix environments, using Subversion (SVN) for version control and Cadence SKILL to customize Cadence EDA tools
Preferred Qualifications
  • M.S. in Electrical Engineering or Computer Science
  • Familiarity with ROIC architecture and design concepts
  • Familiarity with distributed computing environments
  • Familiarity with Digital Design and Signoff tools, such as Cadence Genus, Innovius, Tempus, Voltus, or Synopsys Design Compiler, IC Compiler, Fusion Compiler, Prime Time, TestMAX
  • Experience with simulators like Spectre, Ultrasim, and Custom Sim
  • Great interpersonal skills and a passion for providing excellent support for team members
Benefits
  • Competitive total rewards package with compensation; healthcare, wellness, and work/life benefits; career development and recognition programs
  • Parental (including paternal) leave, flexible work schedules, achievement awards, educational assistance, and child/adult backup care
  • Relocation assistance available
  • Company values:
    Trust, Respect, Accountability, Collaboration, Innovation, and Safety

As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in‑person at one of our office locations, regardless of whether the role is designated as on‑site, hybrid or remote.

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act.

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