Senior FPGA Image Pipeline Engineer; HLS​/ISP

At Alcon, we are driven by the meaningful work we do to help people see brilliantly. We innovate boldly, champion progress, and act with speed as the global leader in eye care. Here, you’ll be recognized for your commitment and contributions and see your career like never before. Together, we go above and beyond to make an impact in the lives of our patients and customers.

We foster an inclusive culture and are looking for diverse, talented people to join Alcon. As a Principal FPGA Image Pipeline Engineer supporting Research & Development of Alcon’s Surgical Instrumentation in Goleta, CA, you will be trusted to assist in the design of next-gen surgical cameras used in eye surgery.

In this role, a typical day will include:

• Developing image processing pipeline on Field-Programmable Gate Array (FPGA) using High Level Synthesis (HLS).
• Translating image processing algorithm from C/Matlab to FPGA fabric in HLS.
• Continuously improving algorithm in C/Matlab and HLS to meet requirement.
• Designing FPGA logic using VHDL and Verilog, writing test benches for functional simulation. Closing timing on FPGA designs.
• Interfacing FPGA to external hardware peripherals, including high resolution image sensors, temperature sensor, flash memories, etc.
• Programming embedded processors using C language,
• Testing embedded system through UART/RS-232, J-tag debugger, LEDs, oscilloscope, logic analyzer, etc.
• Developing firmware following Agile Design Methodology. Using version control to commit and push firmware code. Performing code review through pull request. Writing detailed design documentation.
• Creating host computer test tool or script using C/C++ or python Python to test embedded systems.
• Interact with outside customers, suppliers, and functional peer groups. Communicating to vendors’ field application engineers (FAE) for technical support.

• Bachelor’s Degree or Equivalent years of directly related experience (or high school +13 yrs; Assoc.+9 yrs; M.S.+2 yrs; PhD+0 yrs)
• The ability to fluently read, write, understand and communicate in English
• 5 Years of Relevant Experience
• Relocation assistance:
  Yes
• Visa Sponsorship:
  Yes

• Prior FPGA design experience with an emphasis on High Level Synthesis (HLS), including developing complex architectures, implementing finite state machines, and applying best‑practice design techniques such as writing constraints and closing timing.
• Experience with object-oriented programing with C++.
• Understanding of image sensor concepts like gain, exposure, shutter.
• Basic ISP (Image Signal Processor) knowledge like brightness, contrast, gamma, debayer, etc.
• Knowledge of how to use version control.
• Proficient with major FPGA development environments (such as Xilinx ISE/Vivado, Altera Quartus, or Microchip Libero
  
  SoC) and at least one FPGA simulation tool (Model Sim or Questa).
• Proficient with following programming languages: VHDL, Verilog/System Verilog; C/C++;
  Python
• Knowledge of basic interfaces like I2C, SPI, UART/RS-232.,
• Working experience of Hyper Terminal, Tera Term, or equivalent.
• Ability to read and understand schematics and PCB layout.
• Hands‑on experience using standard electronic test equipment (oscilloscopes, digital multimeters, frequency generators, logic analyzers, etc.) and strong ability to troubleshoot issues at the Printed Circuit Board Assembly (PCBA) level.

• Join Alcon’s mission to provide top-tier, innovative products and solutions to enhance sight & enhance lives.
• Grow your career in a highly collaborative and diverse environment.
• Alcon provides robust benefits package including health, life, retirement, paid time off, and much more!