Physical Design Engineer

Physical Design Engineer

We are seeking a Physical Design Engineer to support the implementation of complex ASIC/SoC designs from synthesis through tapeout. This role is responsible for physical design execution, timing closure, physical verification, DFT integration, and design optimization while collaborating with cross-functional engineering teams to deliver high-quality, manufacturable silicon.

Key Responsibilities

• Perform full-chip and block-level physical design including synthesis, DFT integration, floor planning, power planning, placement, CTS, routing, post-route optimization, and timing closure.
• Drive timing closure across all corners and modes, addressing setup/hold, signal integrity, and IR/EM requirements.
• Develop and improve physical design and DFT methodologies, flows, and automation.
• Analyze and resolve timing, congestion, power, and implementation issues.
• Perform physical verification including DRC, LVS, and antenna checks.
• Support tapeout activities and assist with post-silicon debugging as needed.
• Evaluate and integrate third-party IP, libraries, and design tools.
• Automate repetitive design tasks using Python, Tcl, and shell scripting.
• Collaborate with RTL, verification, and other engineering teams to ensure successful design integration.