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ASIC​/FPGA Design Engineer IV

Job in Highlands Ranch, Douglas County, Colorado, USA
Listing for: Global Edge Group
Full Time position
Listed on 2026-07-08
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Electronics Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 130000 USD Yearly USD 100000.00 130000.00 YEAR
Job Description & How to Apply Below

This role is for an experienced ASIC/FPGA Design Engineer IV responsible for end-to-end development of complex FPGA and/or ASIC solutions in support of advanced defense and space systems. The position focuses on defining architectures, implementing and verifying RTL, and supporting integration and test in a collaborative, high-performance engineering environment.

RESPONSIBILITIES AND ESSENTIAL DUTIES:
  • Perform all aspects of ASIC and FPGA development across the full lifecycle, from requirements capture through architecture, RTL design, analysis, simulation, and verification.
  • Develop, implement, and integrate VHDL/Verilog/System Verilog RTL for complex digital functions, ensuring timing closure, resource efficiency, and adherence to interface and performance requirements.
  • Support creation of design documentation, including architecture descriptions, interface specifications, and verification plans.
  • Collaborate closely with verification engineers to develop and execute verification strategies, including testbench development, simulation, coverage analysis, and regression execution.
  • Participate in design and technical reviews, present design status and trade studies, and support resolution of design and integration issues.
  • Support hardware-in-the-loop (HIL) testing, lab bring-up, and system integration activities as needed to validate FPGA/ASIC designs in target environments.
MINIMUM REQUIREMENTS:

Basic Qualifications
  • Bachelor of Science or higher in Electrical Engineering or a related discipline from an accredited college, or equivalent combined education and experience.
  • Substantial professional experience in FPGA/ASIC design and development (typically 5+ years), including architecture, RTL implementation, and simulation.
  • Hands-on experience with HDL languages such as VHDL, Verilog, and/or System Verilog.
  • Experience developing in a Linux-based environment with industry-standard FPGA/ASIC tool chains.
  • Ability to obtain and maintain a DoD Secret clearance
    ; U.S. Citizenship required per client program requirements.
ADDITIONAL QUALIFICATIONS:
  • Experience across the ASIC/FPGA lifecycle
    , including verification, validation, integration, and test.
  • Experience with space-grade or qualified FPGAs and ASICs and associated vendor tool flows (e.g., AMD/Xilinx, Microchip/Microsemi, Intel/Altera).
  • Knowledge of digital signal processing, high-speed interfaces, or control logic implemented in FPGA/ASIC devices.
  • Experience with scripting or automation (e.g., Python, Tcl, shell) to support design, build, or verification flows.
  • Familiarity with version control, issue tracking, and project management tools such as Git, JIRA, or similar.
  • Strong communication and teamwork skills, with experience mentoring junior engineers and contributing technical leadership within project or functional teams.
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