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Semiconductor Device Modeling Engineer

Job in Hillsboro, Washington County, Oregon, 97104, USA
Listing for: Intel Corporation
Full Time position
Listed on 2026-02-16
Job specializations:
  • Engineering
    Electrical Engineering, Systems Engineer
Salary/Wage Range or Industry Benchmark: 60000 - 80000 USD Yearly USD 60000.00 80000.00 YEAR
Job Description & How to Apply Below

Overview

Intel is shaping the future of technology in AI, analytics, and cloud-to-edge technology. A career at Intel provides opportunities to use technology to power breakthroughs and improve everyday life. Learn more on our You Tube channel or the linked pages.

Team and Organization

Compact Device Modeling Group (CDMG) is part of Intel's Design Technology Platform (DTP). DTP enables Intel Foundry customers to deliver winning products by supporting design, development, and manufacturing services. CDMG co-optimizes Intel s state-of-the-art process technology to enable best-in-class products for data-centric applications.

Role

As a semiconductor device modeling engineer, you will play a key role to support compact modeling activities for Intel s new technologies.

Responsibilities
  • Modeling using Open Model Interface (OMI).
  • Contribute to compact modeling activities and support for Intel s new technologies.
Qualifications

Minimum Qualifications

  • Bachelor s degree in Electrical Engineering or a related discipline and 9+ years of experience OR Master s degree in Electrical Engineering or a related discipline and at least 5 years of industry experience in the semiconductor field; or Ph.D. in Electrical Engineering or a related discipline with a minimum of 3 years of industry experience in the semiconductor field.
  • At least 3+ years of hands-on experience with BSIM or other compact models for transistor modeling at advanced nodes (e.g., FinFET, GAA).
  • At least 3+ years  experience with extraction tools (e.g., ICCAP, MBP) and commercial simulators such as HSPICE, Spectre, etc.
  • At least 3+ years  experience in IV/CV fitting, model retargeting, and corner/statistical variation modeling.
  • At least 3+ years  experience developing LLE models for FinFET or GAAFET technologies.
  • At least 3+ years  experience with Python scripting for automation and documentation.

Preferred Qualifications

  • Ph.D. in Electrical Engineering or a related discipline with 8+ years of industry experience in the semiconductor field.
  • Deep expertise in compact modeling, including one or more of the following areas:
  • Layout-dependent effects (LDE) and their impact on circuit performance.
  • Modeling using Open Model Interface (OMI).
  • Strong understanding of process flow, layout, and basic circuit design/simulation.
  • Modeling self-heating effects and their influence on device and circuit performance.
  • Development of methodologies for device targeting (e.g., transistors) and benchmarking circuits (e.g., ring oscillators), including corners and statistical variation models.
  • Demonstrated experience in technical leadership and collaboration across multiple teams and geographies.
  • Experience with machine learning algorithms and their application in data analysis and compact model development.
Benefits

Our total rewards package includes competitive pay, stock bonuses, health, retirement, and vacation benefits. Details are available through Intel Benefits.

Job Details

Job Type: Experienced Hire

Shift: Shift 1 (United States of America)

Primary

Location:

US, Oregon, Hillsboro

Additional Locations: US, California, Santa Clara

Business Group

Intel Foundry focuses on cutting-edge silicon process and packaging technology leadership for the AI era, enabling customers to design leadership products and scale manufacturing, including advanced packaging and final test and assembly.

Posting and Compliance

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, ancestry, age, disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law.

Benefits:
We offer a total compensation package including pay, stock bonuses, and benefits. The range shown reflects compensation targets across U.S. locations and may vary by location and experience. Your recruiter can share more about the specific range for your location.

Work Model for this Role: This role will require an on-site presence. Job posting details are subject to change.

Additional information:
Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during the hiring process. If you encounter recruitment fees, report to your recruiter.

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