Memory Electrical Validation Engineer

Job Details:

Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud‑to‑edge technology is at the heart of countless innovations. With a career at Intel, you’ll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life.

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Life at Intel

We are looking for an enthusiastic engineer to work with Intel’s latest cutting‑edge memory technologies. As part of the Memory Validation Team you will enable, validate, and debug the Memory subsystem within Intel’s mobile and desktop CPU products.

• Define electrical validation strategy for memory IO interfaces to achieve optimized electrical performance and meet product production goals.
• Validate circuit analog performance, electrical signal integrity compliance to industry standard specifications, and system level margin for stable operation and production target prediction.
• Define MRC (Memory Reference Code) requirements for validation and margin optimization and analyzes, validates, debugs, and optimizes MRC steps and values to optimize margins and quality.
• Conduct and participate in multidisciplinary research in the design, development, testing, validation, and utilization of memory IO and mixed signal architectures inclusive of industry standard datacom applications and custom Intel interfaces.
• Develop procedures, analysis, and designs for validation, validation infrastructure, and systems margin validation.
• Analyze internal and external customer returns with emphasis on improving yields and driving test escape closure.
• Apply and use independent evaluation to select components and equipment based on analysis of specifications, performance, and reliability.
• Perform debug to identify root causes and resolves all functional and triage failures for electrical issues.
• Test interactions between various electrical design features using validation infrastructure.
• Apply understanding of DFT and DFM to collaborate with architecture, design, and pre‑silicon verification teams to ensure capability to validate and test IO architecture implementations.
• Prepare validation specifications, evaluates IP, and generates test reports.
• Ensure products conform to standards and specifications.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• MSEE or bachelor’s in electrical engineering or similar and 2+ years’ experience. Degree should be in electrical engineering, computer engineering or related field.
• 6+ months of experience in:
  • High Speed IO electrical validation
  • Memory Physical Design
  • Mixed signal IP electrical validation

• Memory Electrical validation such as signal integrity, signal margining validation (SIV/SMV)
• Strong Software Skills (Python, C++)
• Usage of robots for automation.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Our total rewards package goes above and beyond just a paycheck. Whether you’re looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.

Job Type: Experienced Hire |

Shift: Shift 1 (United States of America) | Primary

Location:

US, Oregon, Hillsboro | Additional Locations:
Business group:
The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages…