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CPU Formal Verification Engineer

Job in Hillsboro, Washington County, Oregon, 97104, USA
Listing for: Intel Corporation
Full Time position
Listed on 2026-06-02
Job specializations:
  • Engineering
    Software Engineer, Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below

Job Details

Job Description:

Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world‑changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Role Impact

As a Formal Verification Engineer, you will play a pivotal role in ensuring the quality and reliability of Intel's cutting‑edge CPU technologies. Working as part of the CPU team, you will leverage formal verification methodologies to develop, implement, and validate the next generation of high‑performance CPUs that power a variety of innovative devices, from laptops to AI and machine‑learning systems. In this role, you will directly impact Intel's ability to deliver world‑class products that enrich the lives of people across the globe.

Join us and help engineer the future at Intel.

Key Responsibilities
  • Conduct verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms.
  • Create comprehensive formal verification test and coverage plans, including definition of formal verification scope, strategy, and techniques.
  • Create abstraction models for convergence on the design, carve out the right boundaries for the design, and track, verify, and apply abstraction techniques.
  • Develop formal proofs to implement the verification plan, review completed proofs, and develop new formal verification methodologies.
  • Perform convergence on design by creating formal verification methodology, abstraction, and simulation techniques.
  • Find and implement corrective measures to resolve failing tests.
  • Collaborate with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
  • Document test plans and drive technical reviews of plans and proofs with design and architecture teams.
  • Maintain and improve existing functional verification infrastructure and methodology.
  • Understand binary decision diagram (BDD) and data flow graph (DFG) for data paths and resolve BDD complexity on arithmetic.
  • Apply understanding of modeling architecture to simplify and model the problem and use tools to formally prove protocols and architectures.
Qualifications
  • B.S., M.S., or Ph.D. in Computer Engineering or Electrical Engineering with required experience.
  • Experience with applying sequential equivalence checking in complex micro‑architectures.
  • Experience in assertion writing, checker development, coverage analysis, failure debug, and root‑cause analysis.
  • In‑depth computer architecture knowledge with emphasis on out‑of‑order processor execution, memory hierarchy, and memory management.
  • Hands‑on experience with industry‑standard formal verification tools such as Jasper Gold, Questa Formal, VC Formal.
  • Experience with formal abstractions and other complexity reduction techniques.
  • Experience with a hardware modeling language (Verilog, VHDL, or System Verilog) and industry‑standard logic simulation tools.
  • Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.
  • Intel or industry experience in pre‑silicon verification of CPU cores, including specific areas of technical ownership/expertise relevant to CPUs.
  • Preferred:
    Knowledge of Intel Architecture ISA and system architecture, x86 assembly language.
  • Preferred:
    Post‑silicon debug and analysis experience.
  • Preferred:
    Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement.
Job Type and Location

Job Type: Experienced Hire

Shift: Shift 1 (United States of America)

Primary

Location:

US, Oregon, Hillsboro

Additional Locations: US, Arizona, Phoenix; US, California, Folsom; US, California, Santa Clara; US, Texas, Austin

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Annual Salary Range for jobs that could be performed in the US: $–$…

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