SoC Logic Design Engineer

Job Details

Job Description:

Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design. Participates in the definition of architecture and microarchitecture features of the block being designed. Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.

Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Follows secure development practices to address the security threat model and security objects within the design. Works with IP providers to integrate and validate IPs at the SoC level. Drives quality assurance compliance for smooth IPSoC handoff.

Intel's Data Center Group is looking for a highly motivated logic designer engineer to join a seasoned team in designing future generation Intel SOCs.

• Perform RTL coding that meets functional, area, power and timing goals
• Ensure design passes quality checks including Lint, CDC, Low Power checks, etc
• Work with architects to understand design requirements
• Write detailed micro-architectural specifications
• Work closely with verification team to bring up and debug design in simulation
• Work closely with physical design team to ensure design is physically implementable

• Solid problem-solving skills and willingness to multitask
• Excellent written and verbal communication skills
• Willing to work in a dynamic and team-oriented environment
• Excellent collaboration skills

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• Bachelor's degree in Electrical/Computer Engineering or related STEM field with 4 years or more relevant experience. OR
• Master's degree in Electrical/Computer Engineering or related STEM field with 3 years or more relevant experience.
• Depending on the degree obtained above, the listed years of experience will need to be in the following areas:
  • SOC or Subsystem RTL design and integration using Verilog/System Verilog, or:
  • IP RTL design using Verilog/System Verilog

• Experience with SoC flows for Reset, Power Management, Interrupts and Error Handling

Experienced Hire

Shift 1 (United States of America)

US, California, Santa Clara

US, Colorado, Fort Collins; US, Oregon, Hillsboro

At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad‑market Xeon‑based solutions and custom x86‑based products, ensuring tailored innovation for diverse needs across general‑purpose compute, web services, HPC, and AI‑accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership.

Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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