Sr. Digital ASIC Engineer

Job Title

Sr. Digital ASIC Engineer

Date: 6/9/26

Location:

Hillsboro

This position is for an experienced digital design engineer working our next generation wireless audio ASICs.

• Full chip/block level architecture, RTL design and implementation
• Emulation, modeling, simulation, silicon testing and debugging of digital circuits and SOCs
• Providing technical leadership and expertise in all aspects of digital design and implementation

You will work closely with your counterparts in analog, RF, firmware, test and evaluation teams to design and ensure functional and performance requirements are met by the subsystem. Your expertise in low power SOC design, signal processing, processor cores and ASIC implementation will make you a key member of the design group.

• 5+ years (BSEE), 3+ years (MSEE) or 0+ years (PhD) of relevant industry experience
• Experience in implementation with Verilog and System Verilog
• Experience authoring specifications
• Experience in architectural modeling in Matlab, Python, or C
• Experience in Real-time data processing systems

• Understanding of ASIC design flow (RTL design, Verification, Synthesis, Timing Analysis, Power Analysis, Physical Design, Test)
• Famililarity with wireless communication
  • Different modulation schemes such as pi/4 DQPSK, 16
    
    QAM, GFSK
  • Implementation of FIR/IIR filters
  • Compensation for impairments such as Carrier Frequency Offset, Symbol Timing Recovery, Channel Equalization
• ASIC prototyping using FPGA
• Embedded Firmware development using C (for testcase development and firmware debug)
• Lab evaluation using oscilloscopes, logic analyzers, spectrum analyzers
• Familiarity with Audio performance measurements (SNR, THD, SINAD, DR, etc.)
• Familiarity with external communication interfaces (SPI, I2C, I2S, UART, JTAG, etc.)
• Familiarity with different processors (ARM, RISC-V)
  • Familiarity interfacing to standard bus protocols such as AHB, APB, AXI
  • Direct Memory Access controllers
• Clock Domain Crossing techniques
• Low power design techniques
• Design For Test concepts
• Skilled in various scripting languages such as python, perl, TCL, Makefiles, shell scripts

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The typical base pay range for this role across the U.S. is currently USD $91,200 -$177,200 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has different base pay ranges for different work locations in the U.S. Benefits include access to healthcare benefits (including a premium-free medical plan option), a 401(k) plan and company match, an employee stock purchase plan, paid time off (including vacation, sick/wellness, parental leave), among others.

Employees are eligible to participate in an incentive plan, and certain roles are also eligible for additional awards, including recognition and stock. These incentives and awards are based on individual and/or company performance.

Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law. Skyworks strives to create an accessible workplace; if you need an accommodation due to a disability, please contact us at a