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Hybrid Principal Memory Controller RTL Design Engineer
Job in
Hillsboro, Washington County, Oregon, 97104, USA
Listed on 2026-08-28
Listing for:
Rambus
Full Time
position Listed on 2026-08-28
Job specializations:
-
Engineering
Hardware Engineer, Test Engineer, Systems Engineer
Job Description & How to Apply Below
Rambus in Hillsboro, Oregon seeks a Principal Logic Design Engineer to shape micro-architecture and RTL for next‑gen memory controllers for data centers and AI. You will drive PPA-driven design decisions and collaborate across verification, physical design, and customer engagements.
The role requires deep System Verilog/Verilog expertise, 10+ years of ASIC/FPGA experience, and a track record in complex memory interfaces. Hybrid work offers onsite and remote flexibility.
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