Senior RTL Design Engineer — Datacenter IP; Hybrid
Listed on 2026-10-06
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Engineering
Systems Engineer, Hardware Engineer
Intel Corporation's HIPD team seeks a senior Logic Design Engineer to join the UCIE PHY IP for data-center/server designs. You will develop RTL, participate in architecture and microarchitecture feature definition, and optimize for power, performance and area.
Responsibilities include RTL coding, timing/power convergence checks, review of verification plans, and ensuring RTL tests pass. This role supports a hybrid work model across US sites including Santa Clara, Hillsboro, Phoenix, and more.
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This posting is for the Senior RTL Design Engineer — Datacenter IP (Hybrid) role at Intel Corporation, based in Hillsboro, OR, United States.
We are looking to fill the Senior RTL Design Engineer — Datacenter IP (Hybrid) position at Intel Corporation in Hillsboro, OR, United States.
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