IP Technical Program Manager

Job Details:

Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting‑edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry‑leading technology, a rich IP portfolio, a world‑class design ecosystem, and an operationally resilient global manufacturing supply chain.

Intel Foundry will be differentiated from other foundries with a combination of leading‑edge packaging and process technology, committed capacity in the US and Europe, and a world‑class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's, along with Arm and RISC‑V ecosystem IP's. Foundry Services will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages.

Come join us and do something wonderful.

This job opportunity will be part of the Ecosystem Technology Office (ETO) group in IFS responsible for enabling IP ecosystem portfolio in support of Intel IDM
2.0 strategy and IFS customers.

The candidate will need to work with Ecosystem IP partners and IFS stakeholders to develop a rich portfolio for the foundry platforms on leading‑edge foundry technologies to enable customer products and address market segments with best‑in‑class PPAC – power, performance, area, cost IPs.

The candidate will work as the Technical Program Manager of 3rd party vendors IPs.

Driving closure of scope in the technical requirements in the RFQ stage, and in the Statement of Work (SoW). Verify IP release criteria defined in the SoW are met and IP is delivered with high quality and on time.

• Technical program manager, and primary interface with IP Ecosystem Partners.
• Managing and driving to resolution technical and schedule dependencies with IP Ecosystem Partners throughout IP development and execution covering pre‑silicon and post‑silicon.
• Ensuring projects are well planned and executed on time with indicators and communication of project status. Identifying and managing risk. Work cross‑functional dependencies and prioritizing support requests.
• Responsible for IP issue tracking and working with Foundry Design Technology Platform (DTP) team and Technology Development (DT) team to provide prompt feedback and solutions.
• Manage unified messaging between Partners and Intel stakeholders. Build and maintain solid relationships with senior leaders, strategic partners, and 3rd party EDA partners.
• Drive technical support for IFS Ecosystem IP development programs during IP lifecycle:
  High Speed Serdes IP – PCIe, Ethernet, D2D IP‑UCIe, AIB Memory I/F – DDR, LPDDR, HBM‑ Mixed Signal IP's – ADC, DAC, PLL and Foundational IP – Embedded memories, Logic Libraries, GPIO.
• Partner with IFS teams as a subject matter expert to facilitate IP development through IP ecosystem partners.
• Influence and drive conflict resolution across stakeholders and vendors for win/win outcomes.

• Service mindset with a focus on quality solutions.
• Drive velocity of execution and thrive in solving complex problems for customers and suppliers.
• Exceptional problem‑solving abilities and repertoire of skills.
• Skills with ecosystem partnership collaborations.
• Excellent project and program management skills to mitigate risk and drive execution to meet schedule commitments in an ambiguous environment.
• Strong communication and presentation skills to executive management.
• Fearless mindset for growth and passion for continuous learning.
• Demonstrate ability to collaborate, influence and drive decisions in a cross‑functional setting.
• Adapt and swiftly respond to changes in the business environment.
• Working knowledge of IC Product and Design domains, and familiarity with the Foundry‑Fabless model.

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are…