More jobs:
Senior Electrical Engineer - ASIC/FPGA Verification; Onsite
Job in
Collins, Story County, Iowa, 50055, USA
Listed on 2026-07-09
Listing for:
Iowa State University Research Park
Full Time
position Listed on 2026-07-09
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Location: Collins
We are seeking an experienced and driven Senior Electrical or Computer Engineer to play a key role in the design, implementation, and verification of advanced test benches supporting high-performance digital ASICs and FPGAs. In this position, you will contribute to the development of cutting‑edge signal processing and information assurance technologies that power critical Mission Systems capabilities, working alongside a highly collaborative Microelectronics Technology team at the forefront of innovation.
Location:
Cedar Rapids, IA
- Verification environment architecture and design using System Verilog with OVM/UVM
- Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking
- Testbench development for the verification of RTL blocks using VHDL or System Verilog
- Contribute to engineering estimates for new program pursuits.
- Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status
- Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience
- Active and transferable U.S. government issued security clearance is required prior to start date
- U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
- ASIC/FPGA experience with RTL coding, simulation, and verification using VHDL and/or Verilog, including development of test benches for RTL block verification using VHDL and/or System Verilog.
- Working knowledge of chip‑level verification methodologies and tools, including constrained‑random verification, functional coverage, System Verilog, and revision control systems such as Git or Subversion.
- Ability to work independently and collaboratively in multidisciplinary engineering teams supporting fast‑paced, milestone‑driven programs
- Strong written and verbal communication skills.
- Experience with ASIC/FPGA lab validation, DFT and manufacturability concepts, Unix/Linux environments, scripting or C/C++, and industry‑standard simulation and synthesis tools such as Questa Sim, Quartus, Synplify, or Vivado.
Position Requirements
10+ Years
work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
Search for further Jobs Here:
×