ASICS Electronics Engineer

Requisition Number: 28881

Required Travel: 0 - 10%

Employment Type:

Full Time/Salaried/Exempt

Anticipated Salary Range: $ - $

Security Clearance:
Ability to Obtain

Level of

Experience:

Entry Level

Electrical Engineer

Support the U.S. Army Research Laboratory (ARL) in Adelphi, MD with Application Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs). Develop innovative mixed‑signal and photonics‑Integrated Circuit (IC) solutions for advanced Radio Frequency (RF), Machine Learning (ML), and signal‑processing applications.

• Examine EW‑relevant RF, photonics, ML, and signal‑processing algorithms and propose innovations in the IC design space.
• Conceptualize mixed analog, digital, and photonics RF, ML, and signal‑processing algorithms and develop requirements and specifications.
• Predict performance using simulation methods such as PSpice, FEKO, Ansys SW.
• Identify specific design and simulation tools, licenses, and workflows needed to design and test mixed integrated circuits.
• Design mixed integrated circuits using tools such as Synopsys or Cadence design flows.
• Prototype front‑end designs in high‑performance FPGAs and demonstrate functional correctness.

• Recent graduate of PhD program from R1 university with experience in front‑end design and functionality of FPGAs.
• Experience in laboratory RF hardware such as high‑end oscilloscopes, spectrum analyzers, and anechoic chambers.
• Experience designing an ASIC using Synopsys or Cadence design flows including back‑end design to include floor planning, layout, power rails, clock trees, and design‑for‑test.
• Experience implementing analog filters, analog‑to‑digital converters, digital‑to‑analog converters, and tuners in ASICs.
• Completed a GDSII.
• Strong communication (both written and verbal) skills.
• Ability to work independently and in a team environment.
• Ability to obtain a DoD/DoW security clearance.

• Completion of Post Doc.
• Experience using fabrication service (MOSIS, GF) and conducting verification.
• Completed mixed analog/digital design including non‑standard logic cells.
• Completed integrated photonics, digital, and analog IC design.
• Experience in designing in 22 nm technology and below.
• Experience with front‑end design of complex mathematical operators including Fast Fourier Transforms, Convolutional Neural Networks, and subspace operators (SVD, PCA, QR, kernel transformations).

We offer competitive benefits such as best‑in‑class medical, dental, and vision plan choices; wellness resources; employee assistance programs;
Savings Plan Options (401(k)); financial planning tools, life insurance; employee discounts; paid holidays and paid time off; tuition reimbursement; as well as early childhood and post‑secondary education scholarships. Bonus/other non‑recurrent compensation is occasionally offered for qualified positions, and if applicable to this role will be addressed by the recruiter at the screening phase of application.

All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, physical or mental disability, age, or veteran status or any other basis protected by federal, state, or local law.

If you need a reasonable accommodation for any part of the employment process, please contact . Reasonable accommodations are considered on a case‑by‑case basis. Additionally, you may also call 1‑844‑849‑8463 for assistance. Press #3 for HII Mission Technologies.