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Principal Analog IC Design Engineers

Job in Irvine, Orange County, California, 92713, USA
Listing for: ESR Healthcare
Full Time position
Listed on 2026-02-07
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Electrical Engineering, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 160000 USD Yearly USD 160000.00 YEAR
Job Description & How to Apply Below

Overview

Principal Analog IC Design Engineers

Location:

Irvine, CA
Job Type: Permanent
Compensation: $160, Annually
This position is 100% onsite.

Description:

a rapidly growing and well-established semiconductor company is seeking Principal Analog IC Design Engineer to join their team. We are working directly with the hiring manager on this exclusive search. The company offers a highly competitive compensation package, including base salary, annual bonus, and equity.

Responsibilities
  • Drive active circuit design and provide technical leadership across projects
  • Design advanced TIAs using SiGe BiCMOS and FinFET CMOS technologies, achieving performance beyond industry benchmarks
  • Develop millimeter-wave transmission line structures for superior signal integrity
  • Create high-performance broadband analog circuits for optical front-end receivers
  • Design supporting analog blocks such as linear regulators, AGC loops, sensors, and bandgap references
  • Define microarchitecture for major circuit blocks and guide implementation by the design team
  • Collaborate cross-functionally on post-silicon validation, qualification, mass production, and customer engagement
Qualifications
  • Bachelor's degree in Electrical Engineering with 8-12+ years of relevant experience, or Master's/PhD with 5-8+ years in high-performance RF/Analog Receiver, TIA, Driver, or RFIC design
  • Proven track record in chip tape-out and lab evaluation of high-performance receivers
  • Proficiency with EDA CAD tools and hands-on IC performance measurement/debugging
  • Strong foundation in transistor-level design, device physics, and control/feedback loop stability analysis
Preferred Skills
  • Expertise in multiple technologies, especially SiGe BiCMOS and FinFET CMOS
  • Experience designing physical layer ICs for high-speed optical fiber data communication
  • Leadership experience mentoring junior designers and serving as chip lead
  • Successful history of taking chips to mass production
  • Ability to translate chip-level specifications into architectural designs
  • Analog custom layout experience
Bonus Expertise
  • AGC loop design
  • High-precision analog circuits (linear regulators, current sensors, bandgaps, drivers, DAC/ADC)
  • Continuous-time linear equalizers
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