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Principal Hardware Architect & Engineering Manager

Job in Irvine, Orange County, California, 92713, USA
Listing for: Delphi Engineering Group
Full Time position
Listed on 2026-02-24
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 125000 - 150000 USD Yearly USD 125000.00 150000.00 YEAR
Job Description & How to Apply Below

DEG Careers – Principal Hardware Architect & Engineering Manager

Location:

Irvine, CA

Employment Type:

Full-time

Reports To:

CEO / Executive Leadership

Role Summary

The Principal Hardware Architect & Engineering Manager is the senior technical and execution authority for DEG’s FPGA-based hardware platforms. This role combines hands‑on hardware architecture and board‑level design with direct management of the hardware and FPGA engineering function.

This position owns:

  • Hardware system architecture
  • Hardware ↔ FPGA integration
  • Engineering execution, priorities, and delivery

This is not a pure people‑management role and not a layout‑only role. It is a hands‑on technical leadership position with real accountability.

Core Responsibilities System & Hardware Architecture
  • Define system‑level hardware architecture for PCIe, FMC/FMC+, and VPX platforms
  • Architect high‑speed data acquisition and playback systems
  • Select and qualify key technologies (FPGAs, ADCs/DACs, clocking subsystems)
  • Define PCIe Gen4/Gen5 hardware architecture and throughput strategy
  • Establish hardware design standards reused across product families
  • Own technical tradeoffs involving performance, risk, cost, and schedule
Board‑Level Hardware Design
  • Own complete board designs from concept through production release
  • Drive schematic capture for FPGA subsystems, high‑speed serial interfaces, memory, power and clocking
  • Define PCB stackups, routing constraints, and SI/PI requirements
  • Work directly with PCB designers to ensure correct implementation
  • Lead board bring‑up, debug, and validation
  • Resolve cross‑discipline hardware issues (hardware ↔ FPGA ↔ test)
  • Define FPGA‑facing hardware architecture (JESD
    204 topology, clock domains, reset strategy, PCIe interfaces)
  • Review FPGA designs for hardware compatibility and system correctness
  • Collaborate with FPGA engineers on interface definition and partitioning
  • Ensure hardware supports FPGA timing, clocking, and throughput needs

This role requires architectural understanding of FPGA systems, not day‑to‑day RTL development.

  • Directly manage hardware and FPGA engineers (employees and contractors)
  • Own engineering priorities, schedules, and resource allocation
  • Balance new development, sustaining engineering, and customer‑driven work
  • Lead design reviews, release decisions, and technical risk assessments
  • Set expectations for design quality, documentation, and release discipline
  • Coordinate engineering work across hardware, FPGA, software, and test
  • Act as the escalation point for technical and execution issues
Technical Leadership & External Interface
  • Serve as the final technical authority for hardware decisions
  • Mentor engineers and enforce engineering standards
  • Interface with customers on deep technical topics when required
  • Support proposal development and technical responses
  • Preserve technical continuity across product generations
Required Qualifications
  • 15+ years experience in complex digital and mixed‑signal hardware design
  • Proven ownership of complete board designs
  • Demonstrated experience leading engineering teams or technical groups
  • Deep expertise in PCIe, SERDES, JESD
    204B/C systems, clocking and power architecture
  • Working knowledge of FPGA architecture sufficient to guide integration
  • Strong bring‑up and debug experience
  • Comfortable making final technical and execution decisions
  • U.S. Person (citizenship or permanent residency)
Preferred Experience
  • AMD/Xilinx Ultra Scale+ or Versal platforms
  • Wideband ADC/DAC or Direct RF systems
  • Defense or aerospace programs
  • Small‑team, high‑ownership environments
  • Competitive salary and comprehensive benefits package:
    • Health insurance
    • Dental insurance
    • Vision insurance
    • Retirement plan with employer matching.
    • Paid time off
  • Exciting projects with the potential to make a significant impact in the field of electronic design.
  • A collaborative and inclusive team culture that values creativity, initiative, and technical excellence.

Delphi Engineering Group is a military and aerospace manufacturer requiring strict adherence to ITAR requirements. As a condition of employment applicants must provide proof of US Citizenship (no green cards or visas).

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Position Requirements
5+ Years work experience
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