Hardware Engineer

Job Description

Broadcom's Central Engineering Design Correlation team is looking for an energetic and self‑driven professional to help with silicon technology evaluation in advanced process nodes for IP and product designs. Our mission is to assess foundry technology offerings, help define new technology platforms for IP and product designs, conduct risk assessment, and provide Broadcom’s design communities with insights into design and process‑technology interactions, especially during co‑development in advanced process nodes.

The candidate will have the opportunity to participate in new technology platform definition, PPAC (power performance area cost) assessment and benchmarking, test structure design, silicon characterization and model‑to‑silicon correlation in the most advanced foundry technology nodes. The candidate will work closely with other experts in the fields of CMOS process technology, device & modeling, process and device reliability, digital & analog IP design, design sign‑off flow for timing and power, CAD & EDA tools, as well as chip designers from various product lines.

Primary duties include assessment of technology offerings and capabilities to meet design needs and drive alignment with IP/product requirements. This role will involve active participation with foundry and internal teams on new technology enablement, including ensuring robustness of technology platforms. The position is in Broadcom’s Irvine facility in California.

• Support IP and Chip teams with technology evaluation, including reliability and design enablement; test structure layout, verification, extraction, simulation, and silicon evaluation.
• Cross‑functional quality assurance of designs and tape‑outs.
• Ensure EDA & RCX tool quality and predictability.
• Readiness and robustness of custom device infrastructure.
• Engage in collaborative team projects involving design, platform technology, operations teams, and foundry partners.

• Advanced degree in EE, Material Science, Physics or related field with 10+ years of industry experience after MS or 7+ years after PhD, with recent work in advanced FINFET (or GAA) nodes.
• Strong background in advanced CMOS technology (FEOL, MEOL, BEOL) including understanding of design‑technology interactions.
• Proficient in interacting with design teams and foundry partners.
• Familiarity with analog and digital design flows and CAD tools.
• Hands‑on experience with device/circuit level test structure designs, verification (DRC, LVS), extraction, spice simulation, silicon characterization (DC/AC/RF) and data analysis.
• Extremely detail‑oriented with strong analytical, communication, and multitasking skills.
• Mix of hands‑on and project management skills.

The annual base salary range for this position is $127,100 – $203,400. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package:
Medical, dental and vision plans, 401(k) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company‑paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.