SerDes Lead Designer
Job in
Irvine, Orange County, California, 92713, USA
Listed on 2026-06-01
Listing for:
Celero Communications, Inc.
Full Time
position Listed on 2026-06-01
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Electrical Engineering
Job Description & How to Apply Below
We are looking for a Ser Des Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI.
Preferred Location - On-Site at our Irvine, CA HQ
Alternate Location - San Jose, California;
Vancouver, British Columbia;
Ottawa, Ontario
Candidate will have the opportunity to architect and design Ser Des for next generation transceivers.
What You Will Do:
- Define architecture, specifications, and circuit topologies for next-generation Ser Des
- Overview development of system-level modelling, with behavioral models (e.g., MATLAB, System Verilog, Verilog-A) to analyze link budgets, equalization strategies and jitter budgeting
- Design high-performance analog/mixed-signal circuits in advanced node technologies
- Develop and overview the design of critical blocks including RX/TX equalization (CTLE, DFE), High-speed PLLs, Phase interpolators, DLLs, TDCs
- Implement digitally assisted analog circuits, background calibration, and adaptive loops to improve Power, Performance, Area
- Oversee physical layout to minimize parasitics, device stress, electromigration and process variation impacts
- Overview of the analysis of Signal Integrity and Power Integrity to achieve system-defined targets
- Lead lab validation, debugging and characterization of Ser Des IPs within our state-of-the-art lab
- Correlate silicon measurements with simulated data, and lead performance optimization in the system environment
- Master's degree and/or PhD in Electrical Engineering or related fields with 10+ years of relevant experience in Ser Des design
- Proven record of taking high-speed Ser Des design to tape-out and volume production
- Experience in lab bring-up, characterization, and debugging designs that reach out production
- Must have extensive experience with advanced node technologies (16nm/12nm, 7nm, 5nm, 3nm, 2nm processes)
- Prior experience in cross-functional interaction to deliver IP and ensuring seamless integration in SOCs
- Strong communication and documentation skills
$150,000 - $250,000 Annually
The final offer will be determined based on job-related skills, experience, qualifications, and location.
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