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Senior Lead DSP/RTL Design Engineer; FPGA/ASIC
Job in
Irvine, Orange County, California, 92713, USA
Listed on 2026-06-18
Listing for:
Infineon Technologies
Full Time
position Listed on 2026-06-18
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
A leading semiconductor firm in Irvine, CA is seeking a Lead Principal Engineer for Digital Design. This role involves implementing DSP algorithms in Verilog/System Verilog and collaborating with teams on hardware architecture. Candidates should have 15+ years of RTL design experience and strong knowledge of fixed-point math and DSP fundamentals. This position offers a competitive salary range between $201,400 and $277,000, plus participation in an incentive plan.
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Position Requirements
10+ Years
work experience
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