Physical Design Engineer at Syntiant Irvine, CA

Physical Design Engineer job ine, CA.

Syntiant Corp., a leader in the high-growth AI software and semiconductor solutions space, has entered into an agreement to acquire a large, multi-national sensor business with global revenues in excess of $250 million per year, and is looking for an experienced and talented Sr. Staff Physical Design Engineer
.

As Physical Design Engineer
, you will be a key player in the ASIC R&D team. You are presented with a unique opportunity to drive the complete physical design flow, from RTL-to-GSDII to achieve best in class PPA for the next generation Syntiant ASICs while working in a cross-functional environment interacting with multiple teams.

• Drive next generation physical design work to achieve best in class PPA for Syntiant’s next generation ASICs.
• RTL to GDSII Physical Design Implementation, including Synthesis, Pad Ring, Floorplan, Placement, Clock Tree Synthesis, Detailed Routing and Optimization, in addition to Physical Signoff Verification.
• Work with Physical Verification Team to clean-up layout violations.
• Work with foundry to complete tape-out related forms and checks.

• Advanced degree in electronics engineering with 5+ years’ experience in physical design and implementation.
• Excellence in complete RTL to GDSII flow with strong experience in the usage of industry-standard Electronic Design Automation (EDA) tools for both physical design and timing signoff with a focus on improving PPA (Performance, Power, Area).
• Deep knowledge on industry standards and practices in physical design including physically aware synthesis flow, floor-planning, place & route, metal fill, chip finishing, signal integrity checks, and static/dynamic EMIR-Drop analysis, and formal ESD verification.
• Experience in building chip floorplan including partitions and power grid.
• Experience in Signoff ECO flow to fix timing, noise, IR-Drop and EMIR violations.
• Experience in physical design verification to debug & fix LVS/DRC/PERC issues at the chip/block level using industry standard tools.
• Experience in UPF flow.
• Experience in tape-out related communication with foundry (forms, jobview, etc).
• Experience in package, RDL routing design.
• Experience with Programming/scripting languages (e.g., Python or Perl, tcl).
• Experience with scan insertion and ATPG pattern generation is a plus.
• Experience with power analysis flows is a plus.

• Medical: Several plan options including PPO and HSA-compatible plans from Anthem Blue Cross, most of which are 100% paid by Syntiant Corp. for you and your family.
• Dental: Company-paid dental PPO coverage from Met Life, including coverage for Orthodontia.
• Vision: Company-paid vision PPO coverage from Met Life / VSP.
• Life Insurance / AD&D: Company-paid basic Life / AD&D coverage in the amount of 3x your salary (up to $1,000,000). Additional supplemental life insurance with low group rates is available for yourself and your family.
• Disability Coverage: Company-paid Short Term and Long-Term Disability coverage provides up to 60% income replacement protection.
• Spending and Savings Accounts: Flexible Spending Account (FSA) benefits for Health Care and Dependent Care. Health Savings Accounts (HSA) for those enrolled in a qualified Medical plan.
• 401K Retirement Plan: Administered by Empower, the 401(k) plan allows you to plan for your future by investing a portion of each paycheck.
• Other Benefits: A company-provided Employee Assistance Program (EAP), as well as access to additional voluntary benefits including Accident, Critical Illness, Hospital Indemnity, Legal Support, and Identity Fraud Protection.

Founded in 2017 and headquartered in Irvine, Calif., Syntiant Corp. is a leader in delivering hardware and software solutions for edge AI deployment. The company’s purpose-built silicon and hardware-agnostic models are being deployed globally to power edge AI speech, audio, sensor and vision applications across a wide range of consumer and industrial use cases, from earbuds to automobiles. Syntiant’s advanced chip solutions merge deep learning…