More jobs:
Senior PLL Design Engineer Speed Transceivers
Job in
Irvine, Orange County, California, 92713, USA
Listed on 2026-07-02
Listing for:
Celero Communications, Inc.
Full Time
position Listed on 2026-07-02
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
Celero Communications, Inc. is seeking a High-Speed CMOS PLL Analog Design Engineer to deliver innovative clocking circuits for optical transceivers. You will be responsible for architecting and designing PLLs, addressing challenges in advanced node technologies, and supervising layouts produced by engineers.
A Master's degree or PhD in Electrical Engineering, coupled with over 5 years of PLL design experience, is essential. This role offers a salary between $150,000 and $250,000 annually, based on skills and experience.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
Search for further Jobs Here:
×